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The rise of cloud computing demands secure memory systems that ensure data confidentiality, integrity, and freshness against replay attacks. Existing schemes such as AES-XTS, AES-GCM, and AES-CTR each trade performance for security, with…

Computing-in-memory (CIM) promises to alleviate the Von Neumann bottleneck and accelerate data-intensive applications. Depending on the underlying technology and configuration, CIM enables implementing compute primitives in place, such as…

The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability.…

We propose spin transfer torque--magnetoresistive random access memory (STT-MRAM) based on magneto-resistance and spin transfer torque physics of band-pass spin filtering. Utilizing the electronic analogs of optical phenomena such as…

Embedded non-volatile memory technologies such as resistive random access memory (RRAM) and spin-transfer torque magnetic RAM (STT MRAM) are increasingly being researched for application in neuromorphic computing and hardware accelerators…

Quantum error correction (QEC) is essential for realizing scalable quantum computation. However, when evaluating its benefits, most analyses assume idealized components, overlooking the imperfections inherent in realistic fault-tolerant…

In this paper, we present a novel cache design based on Multi-Level Cell Spin-Transfer Torque RAM (MLC STTRAM) that can dynamically adapt the set capacity and associativity to use efficiently the full potential of MLC STTRAM. We exploit the…

State-of-the-art techniques for addressing scaling-related main memory errors identify and repair bits that are at risk of error from within the memory controller. Unfortunately, modern main memory chips internally use on-die error…

Fault-tolerant (FT) computation by using quantum error correction (QEC) is essential for realizing large-scale quantum algorithms. Devices are expected to have enough qubits to demonstrate aspects of fault tolerance in the near future.…

Relaxed retention (or volatile) spin-transfer torque RAM (STT-RAM) has been widely studied as a way to reduce STT-RAM's write energy and latency overheads. Given a relaxed retention time STT-RAM level one (L1) cache, we analyze the impacts…

Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is an attractive alternative to current random access memory technologies due to its non-volatility, fast operation and high endurance. STT-MRAM does though have…

Collective coherent noise poses challenges for fault-tolerant quantum error correction (FTQEC), as it falls outside the usual stochastic noise models. While constant excitation (CE) codes can naturally avoid coherent noise, a complete…

This paper presents physical modeling and benchmarking for two-terminal spin-orbit torque magnetic random-access memory (2T-SOT-MRAM). The results indicate that the common SOT materials that provide only in-plane torque can provide little…

Write asymmetry, the significantly different write current for high-to-low and low-to-high resistance switching because of natural stochastic behaviors of magnetization, is a fundamental issue in magnetic random-access memory (MRAM). For…

This paper investigates the impact of thermal stability relaxation in double-barrier magnetic tunnel junctions (DMTJs) for energy-efficient spin-transfer torque magnetic random access memories (STT-MRAMs) operating at the liquid nitrogen…

To optimize the design of STT-MRAM (spin-transfer torque magnetic random access memory), it is necessary to be able to predict switching (error) rates. For small elements, this can be done using a single-macrospin theory since the element…

Chip Guard is a new approach to symbol-correcting error correction codes. It can be scaled to various data burst sizes and reliability levels. A specific version for DDR5 is described. It uses the usual DDR5 configuration of 8 data chips,…

Storage-class memory (SCM) combines the benefits of a solid-state memory, such as high-performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Among candidate solid-state…

Modern FFT/NTT analytics, coded computation, and privacy-preserving ML interface routinely move polynomial frames across NICs, storage, and accelerators. However, even rare silent data corruption (SDC) can flip a few ring coefficients and…

Spin Transfer Torque Random Access Memory (STT-RAM) is an emerging Non-Volatile Memory (NVM) technology that has garnered attention to overcome the drawbacks of conventional CMOS-based technologies. However, such technologies must be…