Related papers: A novel structure designed for high density nonvol…
Due to increasing cache sizes and large leakage consumption of SRAM device, conventional SRAM caches contribute significantly to the processor power consumption. Recently researchers have used non-volatile memory devices to design caches,…
As one of the most important members of the two dimensional chalcogenide family, molybdenum disulphide (MoS2) has played a fundamental role in the advancement of low dimensional electronic, optoelectronic and piezoelectric designs. Here, we…
In this paper, we propose a simulation-based novel Split-Gate Trench MOSFET structure with an optimized fabrication process to enhance power efficiency, switching speed, and thermal stability for high-performance semiconductor applications.…
We propose an improved scheme for low-power writing of binary bits in non-volatile (multiferroic) magnetic memory with electrically generated mechanical stress. Compared to an earlier idea [Tiercelin, et al., J. Appl. Phys., 109, 07D726…
Emerging non-volatile memory technologies (NVRAM) offer alternatives to hard drives that are persistent, while providing similar latencies to DRAM. Intel recently released the Optane drive, which features 3D XPoint memory technology. This…
The combination of deep learning and ab initio materials calculations is emerging as a trending frontier of materials science research, with deep-learning density functional theory (DFT) electronic structure being particularly promising. In…
Hysteretic gate responses of two-dimensional material heterostructures serve as sensitive probes of the underlying electronic states and hold significant promise for the development of novel nanoelectronic devices. Here we identify a new…
Vertical structures of SiO$_{2}$ sandwiched between a top tungsten electrode and conducting non-metal substrate were fabricated by dry and wet etching methods. Both structures exhibit similar voltage-controlled memory behaviors, in which…
HPC as a service (HPCaaS) is a new way to expose HPC resources via cloud services. However, continued effort to port large-scale tightly coupled applications with high interprocessor communication to multiple (and many) nodes synchronously,…
Resistance switching random access memory (ReRAM), with the ability to repeatedly modulate electrical resistance, has been highlighted as a feasible high-density memory with the potential to replace negative-AND (NAND) flash memory. Such…
Recent breakthroughs in recurrent deep neural networks with long short-term memory (LSTM) units has led to major advances in artificial intelligence. State-of-the-art LSTM models with significantly increased complexity and a large number of…
We report a novel field-sensitive tunneling barrier by embedding C60 in SiO2 for nonvolatile memory applications. C60 is a better choice than ultra-small nanocrystals due to its monodispersion. Moreover, C60 provides accessible energy…
Cryo-computing - both classical and quantum, is severely limited by the absence of a suitable cryo-memory. The challenge both in terms of energy efficiency and speed have been known for decades, but so far conventional technologies have not…
High-throughput quantum-chemical calculations underpin modern molecular modelling, materials discovery, and machine-learning workflows, yet even semi-empirical methods become restrictive when many molecules must be evaluated. Here we report…
In our earlier work [Appl. Phys. Lett. 92, 022509 (2008)], we proposed nonvolatile vortex random access memory (VRAM) based on the energetically stable twofold ground state of vortex-core magnetizations as information carrier. Here we…
We report the fabrication and study of Hall bar MOSFET devices in which an overlapping-gate architecture allows four-terminal measurements of low-density 2D electron systems, while maintaining a high density at the ohmic contacts.…
Memory management is necessary with the increasing number of multi-connected AI devices and data bandwidth issues. For this purpose, high-speed multi-port memory is used. The traditional multi-port memory solutions are hard-bounded to a…
Traditional neural networks require enormous amounts of data to build their complex mappings during a slow training procedure that hinders their abilities for relearning and adapting to new data. Memory-augmented neural networks enhance…
The Last Level Cache (LLC) is the processor's critical bridge between on-chip and off-chip memory levels - optimized for high density, high bandwidth, and low operation energy. To date, high-density (HD) SRAM has been the conventional…
The memory hierarchy has a high impact on the performance and power consumption in the system. Moreover, current embedded systems, included in mobile devices, are specifically designed to run multimedia applications, which are memory…