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Flash memories intended for SSD and mobile applications need to provide high random I/O performance. This requires using efficient schemes for reading small chunks of data (e.g. 0.5KB - 4KB) from random addresses. Furthermore, in order to…

Information Theory · Computer Science 2012-03-01 Eran Sharon , Idan Alrod

\emph{Resistive memories}, such as \emph{phase change memories} and \emph{resistive random access memories} have attracted significant attention in recent years due to their better scalability, speed, rewritability, and yet non-volatility.…

Information Theory · Computer Science 2021-09-22 Yeow Meng Chee , Michal Horovitz , Alexander Vardy , Van Khu Vu , Eitan Yaakobi

High density Solid State Drives, such as QLC drives, offer increased storage capacity, but a magnitude lower Program and Erase (P/E) cycles, limiting their endurance and hence usability. We present the design and implementation of…

Hardware Architecture · Computer Science 2022-08-02 Shehbaz Jaffer , Kaveh Mahdaviani , Bianca Schroeder

Prices of NAND flash memories are falling drastically due to market growth and fabrication process mastering while research efforts from a technological point of view in terms of endurance and density are very active. NAND flash memories…

Hardware Architecture · Computer Science 2012-09-17 Jalil Boukhobza , Pierre Olivier , Stéphane Rubini

A rewriting code construction for flash memories based upon lattices is described. The values stored in flash cells correspond to lattice points. This construction encodes information to lattice points in such a way that data can be written…

Information Theory · Computer Science 2010-07-13 Brian M. Kurkoski

Raw bit errors are common in NAND flash memory and will increase in the future. These errors reduce flash reliability and limit the lifetime of a flash memory device. We aim to improve flash reliability with a multitude of low-cost…

Hardware Architecture · Computer Science 2018-08-16 Yixin Luo

Flash-based disk caches, for example Bcache and Flashcache, has gained tremendous popularity in industry in the last decade because of its low energy consumption, non-volatile nature and high I/O speed. But these cache systems have a worse…

Operating Systems · Computer Science 2023-11-16 Chaos Dong , Fang Wang , Jianshun Zhang

A primary source of increased read time on NAND flash comes from the fact that in the presence of noise, the flash medium must be read several times using different read threshold voltages for the decoder to succeed. This paper proposes an…

Information Theory · Computer Science 2022-02-14 Borja Peleato , Rajiv Agarwal , John Cioffi , Minghai Qin , Paul H. Siegel

MDS array codes are widely used in storage systems to protect data against erasures. We address the \emph{rebuilding ratio} problem, namely, in the case of erasures, what is the the fraction of the remaining information that needs to be…

Information Theory · Computer Science 2011-03-22 Itzhak Tamo , Zhiying Wang , Jehoshua Bruck

This paper summarizes our work on experimentally characterizing, mitigating, and recovering data retention errors in multi-level cell (MLC) NAND flash memory, which was published in HPCA 2015, and examines the work's significance and future…

Hardware Architecture · Computer Science 2018-05-09 Yu Cai , Yixin Luo , Erich F. Haratsch , Ken Mai , Saugata Ghose , Onur Mutlu

MDS array codes are widely used in storage systems to protect data against erasures. We address the \emph{rebuilding ratio} problem, namely, in the case of erasures, what is the fraction of the remaining information that needs to be…

Information Theory · Computer Science 2016-11-17 Itzhak Tamo , Zhiying Wang , Jehoshua Bruck

The read channel in Flash memory systems degrades over time because the Fowler-Nordheim tunneling used to apply charge to the floating gate eventually compromises the integrity of the cell because of tunnel oxide degradation. While…

Information Theory · Computer Science 2014-03-19 Tsung-Yi Chen , Adam R. Williamson , Richard D. Wesel

Large-scale systems with all-flash arrays have become increasingly common in many computing segments. To make such systems resilient, we can adopt erasure coding such as Reed-Solomon (RS) code as an alternative to replication because…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-06-21 Sungjoon Koh , Jie Zhang , Miryeong Kwon , Jungyeon Yoon , David Donofrio , Nam Sung Kim , Myoungsoo Jung

In data storage and data transmission, certain patterns are more likely to be subject to error when written (transmitted) onto the media. In magnetic recording systems with binary data and bipolar non-return-to-zero signaling, patterns that…

Information Theory · Computer Science 2020-02-25 Ahmed Hareedy , Robert Calderbank

An erasure code is said to be a code with sequential recovery with parameters $r$ and $t$, if for any $s \leq t$ erased code symbols, there is an $s$-step recovery process in which at each step we recover exactly one erased code symbol by…

Information Theory · Computer Science 2018-01-23 Balaji Srinivasan Babu , Ganesh R. Kini , P. Vijay Kumar

The most important challenge in the scaling down of flash memory is its increased inter-cell interference (ICI). If side information about ICI is known to the encoder, the flash memory channel can be viewed as similar to Costa's "writing on…

Information Theory · Computer Science 2015-02-11 Yongjune Kim , B. V. K. Vijaya Kumar

Data shaping is a coding technique that has been proposed to increase the lifetime of flash memory devices. Several data shaping codes have been described in recent work, including endurance codes and direct shaping codes for structured…

Information Theory · Computer Science 2017-04-20 Yi Liu , Pengfei Huang , Paul H. Siegel

In this work, we study a recently proposed direct shaping code for flash memory. This rate-1 code is designed to reduce the wear for SLC (one bit per cell) flash by minimizing the average fraction of programmed cells when storing structured…

Information Theory · Computer Science 2020-07-14 Yi Liu , Paul H. Siegel

Two concatenated coding schemes based on fixed-rate Raptor codes are proposed for error control in NAND flash memory. One is geared for off-line recovery of uncorrectable pages and the other is designed for page error correction during the…

Information Theory · Computer Science 2013-12-23 Geunyeong Yu , Jaekyun Moon

In this paper, we consider modulation codes for practical multilevel flash memory storage systems with cell levels. Instead of maximizing the lifetime of the device [Ajiang-isit07-01, Ajiang-isit07-02, Yaakobi_verdy_siegel_wolf_allerton08,…

Information Theory · Computer Science 2009-10-13 Fan Zhang , Henry D. Pfister