Related papers: High gain two-stage amplifier with positive capaci…
In this paper, a two-stage ultra-low-power operational amplifier is designed, and a comparative analysis of the proposed subthreshold complementary amplifier is presented between 180nm, 90nm, and 45nm CMOS technology. The proposed…
In this paper a CMOS two stage operational amplifier has been presented which operates at 1.8 V power supply at 0.18 micron (i.e., 180 nm) technology and whose input is depended on Bias Current. The op-amp provides a gain of 63dB and a…
This paper present high precision halfwave rectifier circuit in dual phase output mode by 0.5 micrometer CMOS technology, plus or minus 1.5 V low voltage, it has received input signal and sent output current signal, respond in high…
A new approach was developed for the design of front-end circuits for semiconductor radiation detectors. The readout scheme consists of a first stage made of only a few components located close to the detector, and of a remote second stage…
In pixelized detectors, reducing power consumption in the front end ASIC chips becomes a crucial demand. Optimization based on mature pre-amplifier schemes today is unlikely to bring sufficient improvements. A new CMOS front-end gain stage…
In this paper, various Miller-compensated amplifiers are analyzed by using the two-port feedback analysis together with the root-locus diagram. The proposed analysis solves problems of Miller theorem/approximation that fail to predict a…
A low power cascode SiGe BiCMOS low noise amplifier (LNA) with current reuse and zero-pole cancellation is presented for ultra-wideband (UWB) application. The LNA is composed of cascode input stage and common emitter (CE) output stage with…
In this work, the designs of a single-stage and 2-stage 2.4 GHz power amplifier (PA) are presented. The proposed PAs have been designed to provide high gain and improved efficiency using harmonic suppression and optimized impedance matching…
This paper presents a low-jitter hybrid voltage level shifter (HVLS) suitable for high-speed applications. The proposed architecture offers the advantage of cross-coupled feedback to simultaneously generate two voltage domain signals with…
A wide-band current preamplifier based on a composite operational amplifier is proposed. It has been shown that the bandwidth of the preamplifier can be significantly increased by enhancing the effective open-loop gain of the composite…
This paper presents a new auto zeroing technique that combines very high-speed operation, low power consumption, and low input switching interferences. This technique has been applied to the design of CMOS flash Analog-to-Digital converter…
We describe five high-voltage (60 to 550V peak to peak), high-speed (1-300ns rise time; 1.3-300MHz bandwidth) linear amplifiers for driving capacitive or resistive loads such as electro-optic modulators. The amplifiers use bipolar…
This paper presents a compact low-power, low-noise bioamplifier for multi-channel electrode arrays, aimed at recording action potentials. The design we put forth attains a notable decrease in both size and power consumption. This is…
In this paper, a highly compact, low power (<10W), high frequency (2 MHz) isolated active clamp forward converter, comprising a coreless Printed Circuit Board-based transformer is proposed. To decrease the size of converter, high switching…
We present design and simulation of a Josephson parametric amplifier with bandwidth exceeding 1.6 GHz, and with high saturation power approaching -90 dBm at a gain of 22.8 dB. An improvement by a factor of roughly 50 in bandwidth over the…
We study a possible circuit solution to overcome the problem of low voltage gain of short-channel graphene FETs. The circuit consists of a fully differential amplifier with a load made of a cross-coupled transistor pair. Starting from the…
This paper studies an architecture with digitally controllable gain and power consumption to mitigate the impact of process variations on CMOS low-noise amplifiers (LNAs). A \SI{130}{nm}, \SI{1.2}{V} LNA implementing the proposed…
We present an impedance engineered Josephson parametric amplifier capable of providing bandwidth beyond the traditional gain-bandwidth product. We achieve this by introducing a positive linear slope in the imaginary component of the input…
A linear redriver circuit implements multi-band equalization techniques to efficiently compensate for high-frequency channel loss and extend high-speed wireline link reach. Input and output stage emitter-follower buffers with dual AC and DC…
Clock generation is an essential part of wireless or wireline communication modules. To facilitate recent advancements in wireline-like communication and in-sensor computing modules at relatively lower data rates, ultra-low power, and…