In this paper a CMOS two stage operational amplifier has been presented which operates at 1.8 V power supply at 0.18 micron (i.e., 180 nm) technology and whose input is depended on Bias Current. The op-amp provides a gain of 63dB and a bandwidth of 140 kHz for a load of 1 pF. This op-amp has a Common Mode gain of -25 dB, an output slew rate of 32 V/μs, and a output voltage swing. The power consumption for the op-amp is 300μW.
@article{arxiv.2012.15737,
title = {Design Of Two Stage CMOS Operational Amplifier in 180nm Technology},
author = {Tong Yuan and Qingyuan Fan},
journal= {arXiv preprint arXiv:2012.15737},
year = {2021}
}