2.4-GHz Integrated CMOS Low-Noise Amplifier (English Version)
Abstract
This paper presents the analysis, design, fabrication, and measurement of an integrated low-noise amplifier (LNA) implemented using a 130 nm CMOS technology, operating in the 2.4 GHz band. The LNA is a crucial component in the performance of receivers, particularly in integrated receivers. The proposed LNA was designed to meet the specifications of the IEEE 802.15.4 standard. Post-layout simulation results, including pads with electrostatic discharge (ESD) protection, are as follows: gain of 10.7 dB, noise figure of 2.7 dB, third-order input intercept point (IIP3) of 0.9 dBm, input and output impedance matching better than -20 dB with respect to 50~ terminations, with a power consumption of 505 W powered from a 1.2 V supply. The obtained results fall within the range of those recently reported for the same topology and operating frequency. The measured scattering parameters (S-parameters) are consistent with the simulation results. This work contributes to the development of a new research line in Cuba on the design of radio-frequency (RF) integrated circuits.
Cite
@article{arxiv.2509.02224,
title = {2.4-GHz Integrated CMOS Low-Noise Amplifier (English Version)},
author = {Jorge L. González-Rios and Juan C. Cruz Hurtado and Robson L. Moreno and Diego Vázquez},
journal= {arXiv preprint arXiv:2509.02224},
year = {2025}
}
Comments
This document is the author's translation of a peer-reviewed paper published initially in Spanish. \textbf{How to cite}: J. L. Gonz\'alez, J. C. Cruz, R. L. Moreno, and D. V\'azquez, "2.4-GHz Integrated CMOS Low-Noise Amplifier," in V International Symposium on Electronics, XVI Convention Informatica 2016, La Habana, Cuba, 14-18 Mar, 2016