Related papers: p+-Al0.3Ga0.7Sb Pocket-Implanted L-shaped GaSb/InA…

We report low-temperature transport measurements of three-terminal T-shaped device patterned from GaAs/AlGaAs heterostructure. We demonstrate the mode branching and bend resistance effects predicted by numerical modeling for linear…

We design and demonstrate selective injection GaN heterojunction bipolar transistors that utilize a patterned base for selective injection of electrons from the emitter. The design maneuvers minority carrier injection through a thin p-GaN…

Ramp-type junctions of $\rm Au-Bi_2Se_3-NbN$ were prepared on top of a bottom gate comprised of a $\rm SrTiO_3$ gate-insulator film on $\rm NbN$ gate-electrode layer on (100) $\rm SrTiO_3$ wafer. Two wafers with gate-insulator thickness of…

In this paper we study the device physics of a technique for realizing an n-p-n bipolar transistor action in the source side of a junctionless nanowire tunneling FET (BJN-TFET). In the on-state, tunneling of electrons from valence band of…

In this letter we not only show improvement in the performance but also in the reliability of 30nm thick biaxially strained SiGe (20%Ge) channel on Si p-MOSFETs. Compared to Si channel, strained SiGe channel allows larger hole mobility…

Gate tunable p-type multilayer tin mono-sulfide (SnS) field-effect transistor (FET) devices with SnS thickness between 50 and 100 nm were fabricated and studied to understand their performances. The devices showed anisotropic inplane…

To realize the full spectrum of advantages that the III-nitride materials system offers, the demonstration of p-channel III-nitride based devices is valuable. Authors report the first p-type field effect transistor (pFET) based on an…

In this paper, a two-dimensional analytical model of a laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO$_2$ and HfO$_2$ is derived. The model…

We present transport measurements on a lateral p-n junction in an inverted InAs/GaSb double quantum well at zero and nonzero perpendicular magnetic fields. At a zero magnetic field, the junction exhibits diodelike behavior in accordance…

Nanostructures fabricated from narrow-gap semiconductors with strong spin-orbit interaction (SOI), such as InAs, can be used to filter momentum modes of electrons and offer the possibility to create and detect spin-polarized currents…

We have fabricated a sub-micron-sized structure consisting of an InAs-based 2DEG, two narrow Nb leads and a gate, where the indirect ballistic transport between the non-oppositely superconducting contacts can be controlled by the voltage…

We report GaN n++/p++ interband tunnel junctions with repeatable negative differential resistance and low resistance. Reverse and forward tunneling current densities were observed to increase as Si and Mg doping concentrations were…

We have successfully demonstrated Si/GaAs p-n heterostructures using Al2O3 ultra-thin oxide interfacial layers. The band diagram and band offsets were investigated using X-ray photoelectron spectroscopy and confirm a small discontinuity in…

We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D…

Difficulties in obtaining high-performance p-type transistors and gate insulator charge-trapping effects present two major challenges for III-V complementary metal-oxide semiconductor (CMOS) electronics. We report a p-GaAs nanowire…

By means of numerical simulation, we study in this work the effects of uniaxial strain on transport properties of strained graphene heterojunctions and explore the possibility to achieve good performance of graphene transistors using these…

In this work, the transport of tunnel field-effect transistor (TFET) based on vertically stacked hereto-structures from 2D transition metal dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. WTe2-MoS2…

A vertical spin metal-oxide-semiconductor field-effect transistor (spin MOSFET) is a promising low-power device for the post scaling era. Here, using a ferromagnetic-semiconductor GaMnAs-based vertical spin MOSFET with a GaAs channel layer,…

Ultrascaled GaSe field effect transistors are investigated through ab initio calculations. GaSe monolayers, 3 nm long, exhibit excellent performance with reduced short-channel effects and considerable high ON-current. Such device…

Short-term reliability and robustness of 110 nm AlN/GaN HEMTs has been evaluated by means of off-state, semi-on state and on-state step stress tests on devices having different gate-drain distance, LGD. While breakdown voltages and critical…