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Existing memory management mechanisms used in commodity computing machines typically adopt hardware based address interleaving and OS directed random memory allocation to service generic application requests. These conventional memory…

Operating Systems · Computer Science 2017-04-06 Lei Liu

A three dimensional parallel implementation of Multiscale Mixed Methods based on non-overlapping domain decomposition techniques is proposed for multi-core computers and its computational performance is assessed by means of numerical…

Future multiprocessor chips will integrate many different units, each tailored to a specific computation. When designing such a system, the chip architect must decide how to distribute limited system resources such as area, power, and…

Hardware Architecture · Computer Science 2017-05-22 Leonid Yavits , Amir Morad , Uri Weiser , Ran Ginosar

Ensuring predictability in modern real-time Systems-on-Chip (SoCs) is an increasingly critical concern for many application domains such as automotive, robotics, and industrial automation. An effective approach involves the modeling and…

Hardware Architecture · Computer Science 2024-08-20 Luca Valente , Francesco Restuccia , Davide Rossi , Ryan Kastner , Luca Benini

We implement and benchmark parallel I/O methods for the fully-manycore driven particle-in-cell code PIConGPU. Identifying throughput and overall I/O size as a major challenge for applications on today's and future HPC systems, we present a…

The state-of-the-art driving automation system demands extreme computational resources to meet rigorous accuracy and latency requirements. Though emerging driving automation computing platforms are based on ASIC to provide better…

Hardware Architecture · Computer Science 2021-04-22 Yuqiong Qi , Yang Hu , Haibin Wu , Shen Li , Haiyu Mao , Xiaochun Ye , Dongrui Fan , Ninghui Sun

Using \textit{multiple streams} can improve the overall system performance by mitigating the data transfer overhead on heterogeneous systems. Prior work focuses a lot on GPUs but little is known about the performance impact on (Intel Xeon)…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-03-30 Zhaokui Li , Jianbin Fang , Tao Tang , Xuhao Chen , Cheng Chen , Canqun Yang

Hybrid physics-machine learning models are increasingly being used in simulations of transport processes. Many complex multiphysics systems relevant to scientific and engineering applications include multiple spatiotemporal scales and…

Fluid Dynamics · Physics 2021-06-09 Shady E. Ahmed , Omer San , Kursat Kara , Rami Younis , Adil Rasheed

The adoption of high-performance multi-core platforms in avionics and automotive systems introduces significant challenges in ensuring predictable execution, primarily due to shared resource interferences. Many existing approaches study…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-14 Mohamed Amine Khelassi , Felix Suchert , Abderaouf Amalou , Benjamin Lesage , Anika Christmann , Robin Hapka , Jeronimo Castrillon , Mihail Asavoae , Mathieu Jan , Claire Pagetti , Selma Saidi

Heterogeneous computing can potentially offer significant performance and performance per watt improvements over homogeneous computing, but the question "what is the ideal mapping of algorithms to architectures?" remains an open one. In the…

Hardware Architecture · Computer Science 2016-05-24 Oren Segal , Nasibeh Nasiri , Martin Margala

Search and rescue, wildfire monitoring, and flood/hurricane impact assessment are mission-critical services for recent IoT networks. Communication synchronization, dependability, and minimal communication jitter are major simulation and…

Robotics · Computer Science 2023-09-07 Emon Dey , Mikolaj Walczak , Mohammad Saeid Anwar , Nirmalya Roy

Suitable reduced order models (ROMs) are computationally efficient tools in characterizing key dynamical and statistical features of nature. In this paper, a systematic multiscale stochastic ROM framework is developed for complex systems…

Computational Physics · Physics 2022-03-23 Changhong Mou , Nan Chen , Traian Iliescu

In the Internet of Things (IoT), devices and gateways may be equipped with multiple, heterogeneous network interfaces which should be utilized by a large number of services. In this work, we model the problem of assigning services' resource…

Networking and Internet Architecture · Computer Science 2015-04-14 Vangelis Angelakis , Ioannis Avgouleas , Nikolaos Pappas , Di Yuan

As Moore's Law has slowed and Dennard Scaling has ended, architects are increasingly turning to heterogeneous parallelism and domain-specific hardware-software co-designs. These trends present new challenges for simulation-based performance…

Increasing complexity of modern multi-processor system on chip (MPSoC) and the decreasing feature size have introduced new challenges. System designers have to consider now aspects which were not part of the design process in past times.…

Other Computer Science · Computer Science 2014-05-14 Aurang Zaib , Prashanth Raju , Thomas Wild , Andreas Herkersdorf

The emergence of new, off-path smart network cards (SmartNICs), known generally as Data Processing Units (DPU), has opened a wide range of research opportunities. Of particular interest is the use of these and related devices in tandem with…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-04 Nathan Tibbetts , Sifat Ibtisum , Satish Puri

Hybrid fault models are known to be an effective means for enhancing the robustness of consensus-based replicated systems. However, existing hybridization approaches suffer from limited flexibility with regard to the composition of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-15 Laura Lawniczak , Tobias Distler

Growing power dissipation due to high performance requirement of processor suggests multicore processor technology, which has become the technology for present and next decade. Research advocates asymmetric multi-core processor system for…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-02-15 Alan David

The hardware/software boundary in modern heterogeneous multicore computers is increasingly complex, and diverse across different platforms. A single memory access by a core or DMA engine traverses multiple hardware translation and caching…

Operating Systems · Computer Science 2017-03-21 Reto Achermann , Lukas Humbel , David Cock , Timothy Roscoe

Multicore timing interference, arising when multiple requests contend for the same shared hardware resources, is a primary concern for timing verification and validation of time-critical applications. Bandwidth control and regulation…

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