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The storage stack in the traditional operating system is primarily optimized towards improving the CPU utilization and hiding the long I/O latency imposed by the slow I/O devices such as hard disk drivers (HDDs). However, the emerging…

Operating Systems · Computer Science 2023-06-21 Junzhe Li , Xiurui Pan , Shushu Yi , Jie Zhang

A wide variety of large-scale data has been produced in bioinformatics. In response, the need for efficient handling of biomedical big data has been partly met by parallel computing. However, the time demand of many bioinformatics programs…

Genomics · Quantitative Biology 2015-08-11 Sungmin Lee , Hyeyoung Min , Sungroh Yoon

In recent years, information retrieval algorithms have taken center stage for extracting important data in ever larger datasets. Advances in hardware technology have lead to the increasingly wide spread use of flash storage devices. Such…

Databases · Computer Science 2012-11-20 Tyler Clemons , S. M. Faisal , Shirish Tatikonda , Charu Aggarawl , Srinivasan Parthasarathy

Modern external memory is represented by several device classes. At present, HDD, SATA SSD and NVMe SSD are widely used. Recently ultra-low latency SSD such as Intel Optane became available on the market. Each of these types exhibits it's…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-02-23 Ruslan Savchenko

NVMe Flash-based SSDs are widely deployed in data centers to cache working sets of large-scale web services. As data centers face increasing sustainability demands, such as reduced carbon emissions, efficient management of Flash…

Hardware Architecture · Computer Science 2025-03-18 Michael Allison , Arun George , Javier Gonzalez , Dan Helmick , Vikash Kumar , Roshan Nair , Vivek Shah

In this paper, we present a novel cache design based on Multi-Level Cell Spin-Transfer Torque RAM (MLC STTRAM) that can dynamically adapt the set capacity and associativity to use efficiently the full potential of MLC STTRAM. We exploit the…

Hardware Architecture · Computer Science 2017-06-13 Amin Jadidi , Mohammad Arjomand , Mahmut T. Kandemir , Chita R. Das

In recent years, emerging storage hardware technologies have focused on divergent goals: better performance or lower cost-per-bit. Correspondingly, data systems that employ these technologies are typically optimized either to be fast (but…

Databases · Computer Science 2022-05-27 Ashwini Raina , Jianan Lu , Asaf Cidon , Michael J. Freedman

Although every individual invented storage technology made a big step towards perfection, none of them is spotless. Different data store essentials such as performance, availability, and recovery requirements have not met together in a…

Hardware Architecture · Computer Science 2019-04-29 Morteza Hoseinzadeh

SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model…

Hardware Architecture · Computer Science 2018-11-06 Donghyun Gouk , Miryeong Kwon , Jie Zhang , Sungjoon Koh , Wonil Choi , Nam Sung Kim , Mahmut Kandemir , Myoungsoo Jung

The standardization of NVMe Zoned Namespaces (ZNS) in the NVMe 2.0 specification presents a unique new addition to storage devices. Unlike traditional SSDs, where the flash media management idiosyncrasies are hidden behind a flash…

Operating Systems · Computer Science 2022-06-06 Nick Tehrany , Animesh Trivedi

Modern databases typically makes use of the Log Structured Merge-Tree for organizing data in indexes, which is a kind of disk-based data structure. It was proposed to efficiently handle frequent update queries (also called update intensive…

Databases · Computer Science 2024-02-28 Supriya Mishra

Prices of NAND flash memories are falling drastically due to market growth and fabrication process mastering while research efforts from a technological point of view in terms of endurance and density are very active. NAND flash memories…

Hardware Architecture · Computer Science 2012-09-17 Jalil Boukhobza , Pierre Olivier , Stéphane Rubini

Current day processors employ multi-level cache hierarchy with one or two levels of private caches and a shared last-level cache (LLC). An efficient cache replacement policy at LLC is essential for reducing the off-chip memory transfer as…

Hardware Architecture · Computer Science 2013-07-25 Bijay Paikaray

Resource utilization is one of the emerging problems in many-chip SSDs. In this paper, we propose Sprinkler, a novel device-level SSD controller, which targets maximizing resource utilization and achieving high performance without…

Hardware Architecture · Computer Science 2017-05-15 Myoungsoo Jung , Mahmut T. Kandemir

Directory-based protocols have been the de facto solution for maintaining cache coherence in shared-memory parallel systems comprising multi/many cores, where each store instruction is eagerly made globally visible by invalidating the…

Hardware Architecture · Computer Science 2012-10-09 Daofu Liu , Yunji Chen , Qi Guo , Tianshi Chen , Ling Li , Qunfeng Dong , Weiwu Hu

With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a few factors of DRAM. Nevertheless, the latency-sensitive nature…

As high-performance computing (HPC) moves into the exascale era, computer scientists and engineers must find innovative ways of transferring and processing unprecedented amounts of data. As the scale and complexity of the applications…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-09-30 Melissa Romanus , Robert B. Ross , Manish Parashar

Shared virtual memory (SVM) is key in heterogeneous systems on chip (SoCs), which combine a general-purpose host processor with a many-core accelerator, both for programmability and to avoid data duplication. However, SVM can bring a…

Hardware Architecture · Computer Science 2018-08-30 Andreas Kurth , Pirmin Vogel , Andrea Marongiu , Luca Benini

The success of DNNs and their high computational requirements pushed for large codesign efforts aiming at DNN acceleration. Since DNNs can be represented as static computational graphs, static memory allocation and tiling are two crucial…

Hardware Architecture · Computer Science 2025-04-08 Victor J. B. Jung , Alessio Burrello , Francesco Conti , Luca Benini

Data center downtime typically centers around IT equipment failure. Storage devices are the most frequently failing components in data centers. We present a comparative study of hard disk drives (HDDs) and solid state drives (SSDs) that…

Machine Learning · Computer Science 2020-12-24 Riccardo Pinciroli , Lishan Yang , Jacob Alter , Evgenia Smirni