Related papers: Metal-Gated Junctionless Nanowire Transistors
Gate-tunable Josephson junctions (JJs) are the backbone of superconducting classical and quantum computation. Typically, these systems exploit low charge concentration materials, and present technological diffculties limiting their…
Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…
In this paper we propose a modified structure of TFET incorporating ferroelectric oxide as the complementary gate dielectric operating in negative capacitance zone, called the Negative Capacitance Tunnel FET (NCTFET). The proposed device…
The p-n junction diode and field-effect transistor (FET) are the two most ubiquitous building blocks of modern electronics and optoelectronics. In recent years, the emergence of reduced dimensionality materials has suggested that these…
We propose a semi-suspended device structure and construct nanogapped, hysteresis-free field-effect transistors (FETs), based on the van der Waals stacking technique. The structure, which features a semi-suspended channel above a…
We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D…
InAs on Insulator (InAsOI) has been recently demonstrated as a promising platform to develop hybrid semiconducting-superconducting Josephson Junctions (JJs) and Josephson Field Effect Transistors (JoFETs). The InAsOI consists of an InAs…
A vertical partial gate carbon nanotube (CNT) field-effect transistor (FET), which is amenable to the vertical CNT growth process and offers the potential for a parallel CNT array channel, is simulated using a self-consistent atomistic…
We propose an analytical device model for a graphene nanoribbon field-effect transistor (GNR-FET). The GNR-FET under consideration is based on a heterostructure which consists of an array of nanoribbons clad between the highly conducting…
Layered semiconductors show promise as channel materials for field-effect transistors (FETs). Usually, such devices incorporate solid back or top gate dielectrics. Here, we explore de-ionized (DI) water as a solution top gate for…
As conventional silicon technology is approaching its fundamental material and physical limits with continuous scaling, there is a growing push to look for new platform to design memory circuits for nanoelectronic applications. In this…
The lack of an easily realizable complementary circuit technology offering low static power consumption has been limiting the utilization of other semiconductor materials than silicon. In this publication, a novel depletion mode JFET based…
Scalability in the fabrication and operation of quantum computers is key to move beyond the NISQ era. So far, superconducting transmon qubits based on aluminum Josephson tunnel junctions have demonstrated the most advanced results, though…
In the pursuit of room temperature quantum hardware, our study introduces a gate voltage tunable quantum wire within a tri-gated n-type junctionless MOSFET. The application of gate voltage alters the parabolic potential well of the…
Using calibrated simulations, we report a detailed study of the doping-less tunnel field effect transistor (TFET) on a thin intrinsic silicon film using charge plasma concept. Without the need for any doping, the source and drain regions…
Superconducting field-effect transitor (SuFET) and Josephson field-effect transistor (JoFET) technologies take advantage of electric field induced control of charge carrier concentration in order to modulate the channel superconducting…
In this paper we study the device physics of a technique for realizing an n-p-n bipolar transistor action in the source side of a junctionless nanowire tunneling FET (BJN-TFET). In the on-state, tunneling of electrons from valence band of…
Graphene is an attractive electrode material to contact nanostructures down to the molecular scale since it can be gated electrostatically. Gating can be used to control the doping and the energy level alignment in the nanojunction, thereby…
In this paper, a two-dimensional analytical model of a laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO$_2$ and HfO$_2$ is derived. The model…
High-performance single-wall carbon nanotube field-effect transistors (SWNT-FETs) are fabricated using directed assembly and mass-produced carbon nanotubes (CNTs). These FETs exhibit operating characteristics comparable to state-of-the-art…