Related papers: Prototype performance studies of a Full Mesh ATCA-…
The ATLAS Trigger system is a key component of the ATLAS experiment at the CERN Large Hadron Collider (LHC), designed to reduce the event rate from the 40 MHz proton-proton bunch crossing frequency to an output suitable for offline storage…
This paper gives an overview of a transaction level modeling (TLM) design flow for straightforward embedded system design with SystemC. The goal is to systematically develop both application-specific HW and SW components of an embedded…
We propose a new fixed latency scheme for Xilinx gigabit transceivers that will be used in the upgrade of the ATLAS forward muon spectrometer at the Large Hadron Collider. The fixed latency scheme is implemented in a 4.8 Gbps link between a…
At the High Luminosity LHC (HL-LHC), the CMS experiment will face a harsh environment with a high instantaneous luminosity up to 7x10$^{34}$/cm$^2$/s corresponding to an average of 140-200 multiple proton-proton collisions per bunch…
We report on the design and test results of a prototype processor for the CMS Level-1 trigger that performs 3-D track reconstruction and measurement from data recorded by the cathode strip chambers of the endcap muon system. The tracking…
During the High Luminosity phase of LHC, up to 200 proton-proton collisions per bunch crossing will bring severe challenges for event reconstruction. To mitigate pileup effects, an extended upgrade program of the CMS experiment is expected.…
The reconstruction of the trajectories of charged particles, or track reconstruction, is a key computational challenge for particle and nuclear physics experiments. While the tuning of track reconstruction algorithms can depend strongly on…
In LHC Run 3, ALICE will increase the data taking rate significantly to 50\,kHz continuous read out of minimum bias Pb-Pb events. This challenges the online and offline computing infrastructure, requiring to process 50 times as many events…
The ALICE High-Level Trigger processes data online, to either select interesting (sub-) events, or to compress data efficiently by modeling techniques. Focusing on the main data source, the Time Projection Chamber, the architecure of the…
This paper introduces the first open-source FPGA-based infrastructure, MetaSys, with a prototype in a RISC-V core, to enable the rapid implementation and evaluation of a wide range of cross-layer techniques in real hardware.…
The Phase-2 ATLAS upgrade for the High Luminosity Large Hadron Collider (HL-LHC) has motivated progressive redesigns of the ATLAS Tile Calorimeter (TileCal) read-out link and control board (Daughterboard). The Daughterboard (DB)…
Limits on power dissipation have pushed CPUs to grow in parallel processing capabilities rather than clock rate, leading to the rise of "manycore" or GPU-like processors. In order to achieve the best performance, applications must be able…
Rapid design space exploration in early design stage is critical to algorithm-architecture co-design for accelerators. In this work, a pre-RTL cycle-accurate accelerator simulator based on SystemC transaction-level modeling (TLM),…
In the new era of HL-LHC experiments, fast-timing detectors are emerging as critical tools for background rejection. Typical requirements include a temporal hit resolution of about 50 ps, a spatial resolution of around 12 $\mu$m, and…
The planned high-luminosity upgrade of the Large Hadron Collider (LHC) at CERN will bring much higher data rates that are far above the capabilities of currently installed software-based data processing systems. Therefore, new methods must…
Given the extremely high output rate foreseen at LHC and the general-purpose nature of ATLAS experiment, an efficient and flexible way to select events in the High Level Trigger is needed. An extremely flexible solution is proposed that…
With the current increase in the data produced by the Large Hadron Collider (LHC) at CERN, it becomes important to process this data in a corresponding manner. To begin with, to efficiently select events that contain relevant information…
The growing demand for more efficient data transmission has made nanoscale high-throughput all-optical switching a critical requirement in modern telecommunication systems. Metasurface-based platforms offer unique advantages because of…
The rapid adoption of large language models (LLMs) is pushing AI accelerators toward increasingly powerful and specialized designs. Instead of further complicating software development with deeply hierarchical scratchpad memories (SPMs) and…
During LHC Run 2 (2015-2018) the ATLAS Level-1 topological trigger allowed efficient data-taking by the ATLAS experiment at luminosities up to 2.1x10$^{34}$ cm$^{-2}$s$^{-1}$, which exceeds the design value by a factor of two. The system…