Related papers: A Low-Voltage, Low-Power 4-bit BCD Adder, designed…
There is a trade-off between transient performance and line current distortion of the DC bus voltage control of single-phase grid-connected voltage source converters. This paper presents an improved DC bus voltage control scheme of such…
In this paper we estimate the performance of 2by3 MIMOMCCDMA system using convolution code in MATLAB which highly reduces BER by increasing the efficiency of system. MIMO and MCCDMA system combination is used to reduce bit error rate and…
The wide bandwidth and large number of antennas used in millimeter wave systems put a heavy burden on the power consumption at the receiver. In this paper, using an additive quantization noise model, the effect of analog-digital conversion…
An area efficient row-parallel architecture is proposed for the real-time implementation of bivariate algebraic integer (AI) encoded 2-D discrete cosine transform (DCT) for image and video processing. The proposed architecture computes…
Low-power potential of mixed-signal design makes it an alluring option to accelerate Deep Neural Networks (DNNs). However, mixed-signal circuitry suffers from limited range for information encoding, susceptibility to noise, and Analog to…
In many modern AI chips and multicore systems-on-chip, embedded applications exhibit predictable inter-core traffic behavior that can be characterized at design time. For such applications, a variety of design-time traffic management and…
Discrete multitone modulation (DMT) systems exploit the capabilities of orthogonal subcarriers to cope efficiently with narrowband interference, high frequency attenuations and multipath fadings with the help of simple equalization filters.…
We introduce a new output amplifier for fully-depleted thick p-channel CCDs based on double-gate MOSFETs. The charge amplifier is an n-type MOSFET specifically designed and operated to couple the fully-depleted CCD with high charge-transfer…
A family of interleaved current-fed high step-up dc-dc converters are introduced and analyzed here by combining a voltage multiplier (VM) and an active clamp circuit for high-voltage high-power applications. Low input currents and output…
In this paper, we design, prototype, and experiment a closed-loop radiative wireless power transfer (WPT) system with adaptive waveform and beamforming using limited feedback. Spatial and frequency domains are exploited by jointly utilizing…
We introduce a sliding window decoder based on belief propagation (BP) with guided decimation for the purposes of decoding quantum low-density parity-check codes in the presence of circuit-level noise. Windowed decoding keeps the decoding…
An analytical framework for performance analysis and optimization of coded V-BLAST is developed. Average power and/or rate allocations to minimize the outage probability as well as their robustness and dual problems are investigated.…
This article presents two area/latency optimized gate level asynchronous full adder designs which correspond to early output logic. The proposed full adders are constructed using the delay-insensitive dual-rail code and adhere to the…
We present efficient circuits for the addition of binary numbers. We assume that we are given arrival times for all input bits and optimize the delay of the circuits, i.e.\ the time when the last output bit is computed. This contains the…
To enable low-power and low-complexity wireless monitoring, an improved circuit design of Analog Joint Source Channel Coding (AJSCC) is proposed for wireless sensor nodes. This innovative design is based on Analog Divider Blocks (ADB) with…
Qudit-based quantum gates offer several advantages over qubit-based counterparts, such as higher information density, the ability to address more complex problems, and richer quantum operations. In this paper, we present three realistic…
This paper presents a new early output hybrid input encoded asynchronous full adder designed using dual-rail and 1-of-4 delay-insensitive data codes. The proposed full adder when cascaded to form a ripple carry adder (RCA) necessitates the…
AI applications have emerged in current world. Among AI applications, computer-vision (CV) related applications have attracted high interest. Hardware implementation of CV processors necessitates a high performance but low-power image…
In today VLSI system design, power consumption is gaining more attention as compared to performance and area. This is due to battery life in portable devices and operating frequency of the design. Power consumption mainly consists of static…
This paper is concerned with the design of capacity approaching ensembles of Low-Densiy Parity-Check (LDPC) codes for correlated sources. We consider correlated binary sources where the data is encoded independently at each source through a…