Related papers: Cross-point architecture for spin transfer torque …

Transistor-based memories are rapidly approaching their maximum density per unit area. Resistive crossbar arrays enable denser memory due to the small size of switching devices. However, due to the resistive nature of these memories, they…

A Compressive Sensing (CS) approach is applied to utilize intrinsic computation capabilities of Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM) devices for IoT applications wherein lifetime energy, device area, and manufacturing…

STT-MRAM with interfacial-anisotropy-type perpendicular MTJ (IPMTJ) is a powerful candidate for the low switching energy design of STT-MRAM. In the literature, the reading operation of STT-MRAM structured with IPMTJs have been not studied…

Valley-spin hall (VSH) effect in monolayer WSe2 has been shown to exhibit highly beneficial features for nonvolatile memory (NVM) design. Key advantages of VSH-based magnetic random-access memory (VSH-MRAM) over spin orbit torque (SOT)-MRAM…

Straintronic magneto-tunneling junction (s-MTJ) switches, whose resistances are controlled with voltage-generated strain in the magnetostrictive free layer of the MTJ, are extremely energy-efficient switches that would dissipate a few aJ of…

Relaxed retention (or volatile) spin-transfer torque RAM (STT-RAM) has been widely studied as a way to reduce STT-RAM's write energy and latency overheads. Given a relaxed retention time STT-RAM level one (L1) cache, we analyze the impacts…

As a unique mechanism for MRAMs, magnetic coupling needs to be accounted for when designing memory arrays. This paper models both intra- and inter-cell magnetic coupling analytically for STT-MRAMs and investigates their impact on the write…

A quantum random access memory (qRAM) is considered an essential computing unit to enable polynomial speedups in quantum information processing. Proposed implementations include using neutral atoms and superconducting circuits to construct…

We propose a novel solid-state disk (SSD) architecture that utilizes a double-data-rate synchronous NAND flash interface for improving read and write performance. Unlike the conventional design, the data transfer rate in the proposed design…

Spiking neural networks (SNNs) are being explored in an attempt to mimic brain's capability to learn and recognize at low power. Crossbar architecture with highly scalable Resistive RAM or RRAM array serving as synaptic weights and neuronal…

Processing-in-memory (PIM) reduces data transfer latency by rolling memory and logic elements into one compute location. As an emergent material candidate for such an architecture, we propose a strained Weyl semimetal based…

As a promising alternative to the Von Neumann architecture, in-memory computing holds the promise of delivering high computing capacity while consuming low power. Content addressable memory (CAM) can implement pattern matching and distance…

The possible use of spin and magnets in place of charge and capacitors to store and process information is well known. Magnetic tunnel junctions are being widely investigated and developed for magnetic random access memories. These are two…

A prototype of magnetoresistive random access memory (MRAM) based on magnetic tunnel junctions (MTJ) was fabricated with crossed-anisotropy of magnetic layers on either side of the tunnelling barrier layer. It is demonstrated that the…

Convolutional neural network (CNN) achieves excellent performance on fascinating tasks such as image recognition and natural language processing at the cost of high power consumption. Stochastic computing (SC) is an attractive paradigm…

Last level caches (LLCs) occupy a large chip-area and there size is expected to grow further to offset the limitations of memory bandwidth and speed. Due to high leakage consumption of SRAM device, caches designed with SRAM consume large…

This paper studies Set Shaping Theory (SST) in a database-index setting under a revised interpretation: SST is not treated as a competing hashing method, but as a structural pre processing layer that can be applied before an existing…

We report the use of spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) to implement a probabilistic binary neural network (PBNN) for resource-saving applications. The in-plane magnetized SOT (i-SOT) MRAM not only enables…

Despite huge success of artificial intelligence, hardware systems running these algorithms consume orders of magnitude higher energy compared to the human brain, mainly due to heavy data movements between the memory unit and the computation…

Hierarchical temporal memory (HTM) is a biomimetic sequence memory algorithm that holds promise for invariant representations of spatial and spatiotemporal inputs. This paper presents a comprehensive neuromemristive crossbar architecture…