Related papers: Facile fabrication of lateral nanowire wrap-gate d…
An important consideration in miniaturizing transistors is maximizing the coupling between the gate and the semiconductor channel. A nanowire with a coaxial metal gate provides optimal gate-channel coupling, but has only been realized for…
We introduce a fabrication method for gate-all-around nanowire field-effect transistors. Single nanowires were aligned perpendicular to underlying bottom gates using a resist-trench alignment technique. Top gates were then defined aligned…
We developed a process to fabricate nanoscale metallic gate electrodes on scanning probe cantilevers, including on the irregular surface of protruding cantilever tips. The process includes a floating-layer technique to coat the cantilevers…
We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a…
We report the successful fabrication of lateral organic spin valves with a channel length in the sub $100\,nm$ regime. The fabication process is based on in-situ shadow evaporation under UHV conditions and therefore yields clean and…
We present overlapping top gate electrodes for the formation of gate defined lateral junctions in semiconducting layers as an alternative to the back gate/top gate combination and to the split gate configuration. The optical lithography…
We report a robust fabrication method for patterning free-standing Pt nanowires for the use as thermal anemometry probes for small-scale turbulence measurements. Using e-beam lithography, high aspect ratio Pt nanowires (~300 nm width, ~70…
A simple and low cost apparatus has been designed and built to measure the electrical resistivity, ($\rho$), of metal and semiconductors in 300-620 K temperature range. The present design is suitable to do measurement on rectangular bar…
We use the strongly temperature-dependent ionic mobility in polymer electrolytes to 'freeze in' specific ionic charge environments around a nanowire using a local wrap-gate geometry. This enables us to set both the threshold voltage for a…
We describe a method for fabrication of uniform aluminum nanowires with diameters below 15 nm. Electron beam lithography is used to define narrow wires, which are then etched using a sodium bicarbonate solution, while their resistance is…
We theoretically investigate nonlinear ballistic thermoelectric transport in a superlattice-structured nanowire. By a special choice of nonuniform widths of the superlattice barriers - analogous to anti-reflection coating in optical systems…
Superconducting nanowires undergoing quantum phase-slips have potential for impact in electronic devices, with a high-accuracy quantum current standard among a possible toolbox of novel components. A key element of developing such…
We performed comparative experimental investigation of superconducting NbN nanowires which were prepared by means of positive-and negative electron-beam lithography with the same positive tone Poly-methyl-methacrylate (PMMA) resist. We show…
We have performed thermal conductance measurements on individual single crystalline silicon suspended nanowires. The nanowires (130 nm thick and 200 nm wide) are fabricated by e-beam lithography and suspended between two separated pads on…
We have fabricated and measured ballistic graphene transistors with two oblique gates that can be independently biased. The gate lengths are about 38 nm and are separated by a distance of 30 nm, the tilting angle being of 45o with respect…
Conventional electron beam lithography has been used to fabricate mesoscopic Nb wires with a superconducting transition temperature above 7.0 K. The typical line width and the thickness were 200 nm and 45 nm respectively. Nb was deposited…
We present a comprehensive computational study of the electronic, thermal, and thermoelectric (TE) properties of gallium nitride nanowires (NWs) over a wide range of thicknesses (3--9 nm), doping densities ($10^{18}$--$10^{20}$ cm$^{-3}$),…
The recent development of the superlattice nanowire pattern transfer (SNAP) technique allows for the fabrication of arrays of nanowires at a diameter, pitch, aspect ratio, and regularity beyond competing approaches. Here, we report the…
We present a lithography-free technique for fabrication of clean, high quality graphene devices. This technique is based on evaporation through hard Si shadow masks, and eliminates contaminants introduced by lithographical processes. We…
Fabrication of superconducting nanomechanical resonators for quantum research, detectors and devices traditionally relies on a lithographic process, resulting in oscillators with sharp edges and a suspended length limited to a few 100…