Related papers: 3D Simulation of Nanowire FETs using Quantum Model…
The silicon nanowire transistor (SNWT) is a promising device structure for future integrated circuits, and simulations will be important for understanding its device physics and assessing its ultimate performance limits. In this work, we…
A physics-based compact model for silicon gate-all-around (GAA) nanowire tunneling FETs (NW-tFETs) with good accuracy has been developed by considering Phonon-Assisted Tunneling (PAT) and transition from Quantum Capacitance Limit (QCL) to…
A simulation methodology for ultra-scaled InAs quantum well field effect transistors (QWFETs) is presented and used to provide design guidelines and a path to improve device performance. A multiscale modeling approach is adopted, where…
As the conventional silicon metal-oxide-semiconductor field-effect transistor (MOSFET) approaches its scaling limits; many novel device structures are being extensively explored. Among them, the silicon nanowire transistor (SNWT) has…
In this study, a SPICE model for negative capacitance vertical nanowire field-effect-transistor (NC VNW-FET) based on BSIM-CMG model and Landau-Khalatnikov (LK) equation was presented. Suffering from the limitation of short gate length…
In this work, quantum ballistic simulation study of a III-V tri-gate MOSFET has been presented. At the same time, effects of device parameter variation on ballistic, subthrshold and short channel performance is observed and presented. The…
Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…
Noisy Intermediate-Scale Quantum (NISQ) devices fail to produce outputs with sufficient fidelity for deep circuits with many gates today. Such devices suffer from read-out, multi-qubit gate and crosstalk noise combined with short…
The sensitive conductance change of semiconductor nanowires and carbon nanotubes in response to binding of charged molecules provide a novel sensing modality which is generally denoted as nanoFET sensors. In this paper, we study the scaling…
Low-dimensional materials such as layered semiconductors or carbon nanotubes (CNTs) have been attracting increasing attention in the last decades due to their inherent scaling properties, which become fundamental to sustain the scaling in…
Quantum computers have the potential to efficiently simulate the dynamics of nanoscale NMR systems. In this work we demonstrate that a noisy intermediate-scale quantum computer can be used to simulate and predict nanoscale NMR resonances.…
In this work, we simulate the expected device performance and the scaling perspectives of Carbon nanotube Field Effect Transistors (CNT-FETs), with doped source and drain extensions. The simulations are based on the self-consistent solution…
An unresolved challenge facing electronics at a few-nm scale is that resistive channels start leaking due to quantum tunneling. This affects the performance of nanoscale transistors, with single-molecule devices displaying particularly low…
Scaling transistors' dimensions has been the thrust for the semiconductor industry in the last 4 decades. However, scaling channel lengths beyond 10 nm has become exceptionally challenging due to the direct tunneling between source and…
Gate-all-around Vertical Nanowire Field Effect Transistors (VNWFET) are emerging devices, which are well suited to pursue scaling beyond lateral scaling limitations around 7nm. This work explores the relative merits and drawbacks of the…
Atomistic quantum transport simulation of realistically large devices is computationally very demanding. The widely used mode space (MS) approach can significantly reduce the numerical cost but good MS basis is usually very hard to obtain…
As metal-oxide-semiconductor field-effect transistors (MOSFET) channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario a heavier transport…
In recent years, three-dimensional GaN-based transistors have been intensively studied for their dramatically improved output power, better gate controllability, and shorter channels for speedup and miniaturization. However, thermal…
A vertical partial gate carbon nanotube (CNT) field-effect transistor (FET), which is amenable to the vertical CNT growth process and offers the potential for a parallel CNT array channel, is simulated using a self-consistent atomistic…
Gate-all-around (GAA) nanowire (NW) field-effect transistor (FET) is a promising device architecture due to its superior gate controllability than that of the conventional FinFET architecture. The significantly higher electron mobility of…