Related papers: PARISROC, a Photomultiplier Array Integrated Reado…
This paper presents a millimeter-scale CMOS 64$\times$64 single charged particle radiation detector system for external beam cancer radiotherapy. A 1$\times$1 $\mu m^2$ diode measures energy deposition by a single charged particle in the…
We report on the design and performance of a mixed-signal application specific integrated circuit (ASIC) dedicated to avalanche photodiodes (APDs) in order to detect hard X-ray emissions in a wide energy band onboard the International Space…
The SALSA chip is a future readout ASIC foreseen for the MPGD detectors, developed in the framework of the EIC collider project, to equip the MPGD trackers of the EPIC experiment. It is designed to be versatile, to be adapted to other…
TIGER (Turin Integrated Gem Electronics for Readout) is a mixed-mode front-end ASIC developed to readout the new inner tracking detector of the BESIII experiment, carried out at BEPCII in Beijing. The detector is planned to be installed…
Photonic integrated circuits (PICs) have emerged as a scalable platform for complex quantum technologies using photonic and atomic systems. A central goal has been to integrate photon-resolving detectors to reduce optical losses, latency,…
A new TDC-chip is under development for the COMPASS experiment at CERN. The ASIC, which exploits the 0.6 micrometer CMOS sea-of-gate technology, will allow high resolution time measurements with digitization of 75 ps, and an unprecedented…
The MIDNA application specific integrated circuits (ASICs) are a series of skipper-CCD readout chips fabricated in a 65 nm low-power CMOS process that implement a correlated double sampling signal processing chain based on dual-slope…
The time resolution of the second monolithic silicon pixel prototype produced for the MONOLITH H2020 ERC Advanced project was studied using a femtosecond laser. The ASIC contains a matrix of hexagonal pixels with 100 {\mu}m pitch, readout…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
We have integrated a system of 16 RISC CPUs to help reconstruct and analyze a 1.3 Terabyte data set of 400 million high energy physics interactions. These new CPUs provided an affordable means of processing a very large data set. The data…
Silicon Photomultipliers (SiPMs) are photon-counting detectors with great potential to improve the sensitivity of optical receivers. Recent studies of SiPMs in communication focus on the speed rather than the power consumption of the…
A monolithic silicon pixel detector prototype has been produced in the SiGe BiCMOS SG13G2 130 nm node technology by IHP. The ASIC contains a matrix of hexagonal pixels with pitch of approximately 100 $\mu$m. Three analog pixels were…
The development of large-area homogeneous photo-detectors with sub-millimeter path lengths for direct Cherenkov light and for secondary-electrons opens the possibility of large time-of-flight systems for relativistic particles with…
We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~\mu \text{m}^2$, where the sensors are Low Gain…
The continued advancements of Silicon Photomultipliers (SiPMs) have made them viable photosensors for low recoil energy Pulse Shape Discrimination (PSD) between fast neutron and gamma interactions when coupled to an appropriate…
Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted…
The SAMpler for PICosecond time (SAMPIC) chip has been designed by a collaboration including CEA/IRFU/SEDI, Saclay and CNRS/LAL/SERDI, Orsay. It benefits from both the quick response of a time to digital converter and the versatility of a…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
The paper presents the design and measurement results of a transient waveform recording ASIC based on the Switched Capacitor Array (SCA) architecture. This 0.18 {\mu}m CMOS prototype device contains two channels and each channel employs a…
The ForwArd Search ExpeRiment (FASER) is an experiment searching for new light and weakly-interacting particles at CERN's Large Hadron Collider. FASER is composed of different sub-detectors, including silicon microstrip detectors,…