Related papers: Optical Link ASICs for the LHC Upgrade

This thesis presents the work carried out in the testing of the ATLAS Phase-II Upgrade electronic systems in the future strips tracker after 2023, to be installed for operations in the HL-LHC period. The high luminosity and number of…

We developed a new front-end application specific integrated circuit (ASIC) for the upgrade of the Maia x-ray microprobe. The ASIC instruments 32 configurable front-end channels that perform either positive or negative charge amplification,…

CLIC is a proposed linear e+e- collider designed to provide particle collisions at center-of-mass energies of up to 3 TeV. Precise measurements of the properties of the top quark and the Higgs boson, as well as searches for Beyond the…

The existing ATLAS Tracker will be at its functional limit for particle fluences of 10^15 neq/cm^2 (LHC). Thus for the upgrades at smaller radii like in the case of the planned Insertable B-Layer (IBL) and for increased LHC luminosities…

The foreseen luminosity upgrade for the LHC (a factor of 5-10 more in peak luminosity by 2021) poses serious constraints on the technology for the ATLAS tracker in this High Luminosity era (HL-LHC). In fact, such luminosity increase leads…

The ATLAS detector at CERN's Large Hadron Collider (LHC) will be exposed to proton-proton collisions from beams crossing at 40 MHz. At the design luminosity of 10^34 cm^-2 s^-1 there are on average 23 collisions per bunch crossing. A…

Detectors at future high energy colliders will face enormous technical challenges. Disentangling the unprecedented numbers of particles expected in each event will require highly granular silicon pixel detectors with billions of readout…

We report on the design and performance of a mixed-signal application specific integrated circuit (ASIC) dedicated to avalanche photodiodes (APDs) in order to detect hard X-ray emissions in a wide energy band onboard the International Space…

As a concern with the reliability and mass of current optical links in LHC experiments, we are investigating CW lasers and light modulators as an alternative to VCSELs. In addition we are developing data links in air, utilizing steering by…

A monolithic silicon pixel ASIC prototype, produced in 2024 as part of the Horizon 2020 MONOLITH ERC Advanced project, was tested with a 120 GeV/c pion beam. The ASIC features a matrix of hexagonal pixels with a 100 \mu m pitch, read by…

To extend the physics reach of the LHC, accelerator upgrades are planned which will increase the integrated luminosity to beyond 3000 fb^-1 and the pile-up per bunch-crossing by a factor 5 to 10. To cope with the increased occupancy and…

The ATLAS pixel detector is the innermost detector of the ATLAS experiment at the Large Hadron Collider at CERN. With approximately 80 million readout channels, the ATLAS silicon pixel detector is a high-acceptance, high-resolution,…

Active Pixel Sensor (APS) technology has shown promise for next-generation vertex detectors. This paper discusses the design and testing of two generations of APS chips. Both are arrays of 128 by 128 pixels, each 20 by 20 micro-m. Each…

CMOS Pixel Sensors tend to become relevant for a growing spectrum of charged particle detection instruments. This comes mainly from their high granularity and low material budget. However, several potential applications require a higher…

Silicon detectors based on the HV-CMOS technology are being investigated as possible candidate for the outer layers of the ATLAS pixel detector for the High Luminosity LHC. In this framework the H35Demo ASIC has been produced in the 350 nm…

We present the design and test results of a Drivers and Limiting AmplifierS ASIC operating at 10 Gbps (DLAS10) and three Miniature Optical Transmitter/Receiver/Transceiver modules (MTx+, MRx+, and MTRx+) based on DLAS10. DLAS10 can drive…

A new TDC chip has been developed for the COMPASS experiment at CERN. The resulting ASIC offers an unprecedented degree of flexibility and functionality. Its capability to handle highest hit and trigger input rates as well as its low power…

We develop the vertex detector for the international linear collider (ILC) using the FPCCD (Fine Pixel CCD), whose pixel size is 5 x 5 um2. Together with the FPCCD sensor, a prototype of the readout ASIC was developed in 2008. The readout…

The ATLAS Planar Pixel Sensor R&D Project is a collaboration of 17 institutes and more than 80 scientists. Their goal is to explore the operation of planar pixel sensors for the tracker upgrade at the High Luminosity-Large Hadron Collider…

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream…