Related papers: Testability of Reversible Iterative Logic Arrays
The emergence of Deep Neural Networks (DNNs) in mission- and safety-critical applications brings their reliability to the front. High performance demands of DNNs require the use of specialized hardware accelerators. Systolic array…
The composite rotation approach has been used to develop a range of robust quantum logic gates, including single qubit gates and two qubit gates, which are resistant to systematic errors in their implementation. Single qubit gates based on…
We exhibit nontrivial transversal logical multi-controlled-$Z$ gates on $[\![N,\Theta(N),\tilde\Theta(N)]\!]$ quantum low-density parity-check codes and $[\![N,\Theta(N),\tilde\Theta(N)]\!]$ quantum locally testable codes with soundness…
In order for quantum communications systems to become widely used, it will probably be necessary to develop quantum repeaters that can extend the range of quantum key distribution systems and correct for errors in the transmission of…
This article discusses the challenges of testing software systems with increasingly integrated AI and LLM functionalities. LLMs are powerful but unreliable, and labeled ground truth for testing rarely scales. Metamorphic Testing solves this…
Attaining fault tolerance while maintaining low overhead is one of the main challenges in a practical implementation of quantum circuits. One major technique that can overcome this problem is the flag technique, in which high-weight errors…
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Quantum computing is emerging as an important (but radical) technology that might take us beyond Moore's law for certain applications. Today, in parallel with improving quantum computers, computer scientists are relying heavily on quantum…
As fault-tolerant quantum computers scale, certifying the accuracy of computations performed with encoded logical qubits will soon become classically intractable. This creates a critical need for scalable, device-independent certification…
This paper presents the design of a novel distributed algorithm d-IRA for the reachability analysis of linear hybrid automata. Recent work on iterative relaxation abstraction (IRA) is leveraged to distribute the computational problem among…
Locating arrays (LAs) can be used to detect and identify interaction faults among factors in a component-based system. The optimality and constructions of LAs with a single fault have been investigated extensively under the assumption that…
Productivity issues such as lengthy compilation and limited code reuse have restricted usage of field-programmable gate arrays (FPGAs), despite significant technical advantages. Recent work into overlays -- virtual coarse-grained…
We simulate the implementation of a T-gate, or $\frac{\pi}{8}$-gate, for a [7,1,3] encoded logical qubit in a non-equiprobable error environment. We demonstrate that the use of certain non-fault tolerant methods in the implementation may…
Recent work on activation and latent steering has demonstrated that modifying internal representations can effectively guide large language models (LLMs) toward improved reasoning and efficiency without additional training. However, most…
Continuous gate sets are a key ingredient for near-term quantum algorithms. Here, we demonstrate a hardware-efficient, continuous set of controlled arbitrary-phase ($\mathrm{C}Z_{\theta}$) gates acting on flux-tunable transmon qubits. This…
Trial-varying disturbances are a key concern in Iterative Learning Control (ILC) and may lead to inefficient and expensive implementations and severe performance deterioration. The aim of this paper is to develop a general framework for…
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In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is…