Related papers: SOC Testing Methodology and Practice
Various chips for the silicon sensors measurements are described. These chips are based on 0.35 um and 0.18um CMOS technology. Several analog chips together with self-trigger /derandomizer one allow to measure silicon sensors designed for…
New testing and development procedures and methods are needed to address topics like power system stability, operation and control in the context of grid integration of rapidly developing smart grid technologies. In this context, individual…
Stochastic computing (SC) allows reducing hardware complexity and improving energy efficiency of error resilient applications. However, a main limitation of the computing paradigm is the low throughput induced by the intrinsic serial…
Simulation platforms facilitate the development of emerging Cyber-Physical Systems (CPS) like self-driving cars (SDC) because they are more efficient and less dangerous than field operational test cases. Despite this, thoroughly testing…
The testing time for a system-on-chip(SOC) largely depends on the design of test wrappers and the test access mechanism(TAM).Wrapper/TAM co-optimization is therefore necessary to minimize SOC testing time . In this paper, we propose an…
Modern System-on-Chip (SoC) designs are becoming more and more complex due to the technology upscaling. SoC designs often operate on multiple asynchronous clock domains, further adding to the complexity of the overall design. To make the…
Continuous integration (CI) has become a ubiquitous practice in modern software development, with major code hosting services offering free automation on popular platforms. CI offers major benefits, as it enables detecting bugs in code…
The introduction of complex SoCs with multiple processor cores presents new development challenges, such that development support is now a decisive factor when choosing a System-on-Chip (SoC). The presented developments support strategy…
While simulation tools for visible light communication (VLC) with photo detectors (PDs) have been widely investigated, similar tools for optical camera communication (OCC) with complementary metal oxide semiconductor (CMOS) sensors are…
Accurate state-of-charge (SOC) estimation is essential for optimizing battery performance, ensuring safety, and maximizing economic value. Conventional current and voltage measurements, however, have inherent limitations in fully inferring…
State-of-the-art robotics simulators operate in discrete time. This requires users to choose a time step, which is both critical and challenging: large steps can produce non-physical artifacts, while small steps force the simulation to run…
In-field test of processor-based devices is a must when considering safety-critical systems (e.g., in robotics, aerospace, and automotive applications). During in-field testing, different solutions can be adopted, depending on the specific…
Retail applications has majorly fraud prevention, procurement, shipping and tax related, pricing, real time bank authentication applications integrated to make the application run successfully. Integration testing here plays an important…
As RISC-V adoption accelerates, domains such as automotive, the Internet of Things (IoT), and industrial control are attracting growing attention. These domains are subject to stringent Size, Weight, Power, and Cost (SWaP-C) constraints,…
This paper presents a hardware-in-the-loop (HIL) verification system for intelligent, camera-based in-body medical devices. A case study of a Video Capsule Endoscopy (VCE) prototype is used to illustrate the system's functionality. The…
On embedded processors that are increasingly equipped with multiple CPU cores, static hardware partitioning is an established means of consolidating and isolating workloads onto single chips. This architectural pattern is suitable for…
Memory cores are usually the densest portion with the smallest feature size in system-on-chip (SOC) designs. The reliability of memory cores thus has heavy impact on the reliability of SOCs. Transparent test is one of useful technique for…
This paper describes an integrated framework for SOC test automation. This framework is based on a new approach for Wrapper/TAM co-optimization based on rectangle packing considering the diagonal length of the rectangles to emphasize on…
The following chapter provides an overview of the techniques used to understand Self-Organised Criticality (SOC) by performing computer simulations. Those are of particular significance in SOC, given its very paradigm, the BTW…
Developing real-time automated test systems for embedded control systems has been a real problem. Some engineers and scientists have used customized software and hardware as a solution, which can be very expensive and time consuming to…