Related papers: RS-232 Led Board
The proposed system implements the electronic embedded lock, its provides a great benefit over traditional lock, which use the manual key, so if the key lost or theft then anybody could open the lock, while thieving or losing the long and…
For years, the open-source RISC-V instruction set has been driving innovation in processor design, spanning from high-end cores to low-cost or low-power cores. After a decade of evolution, RISC architectures are now as mature as the CISC…
The ILD concept, one of two proposed detector concepts for the planned International Linear Collider (ILC), foresees a Time Projection Chamber (TPC) as the main tracking detector. The LCTPC (Linear Collider TPC) collaboration pursues R&D to…
A new data acquisition program for personal computers with Windows operating system has been built at Charles University van de Graaff laboratory. It allows fast data acquisition from CAMAC and other PC interface cards using interrupt or…
We present an optical circuit switch design for programmable integrated photonics (PIPs). Our solution finds the correct and optimal set of matchings that provides all-to-all network connectivity and demonstrates scalability to 32 ports.
High luminosity conditions at the LHC pose many unique challenges for potential silicon based track trigger systems. One of the major challenges is data formatting, where hits from thousands of silicon modules must first be shared and…
The problem of synthesis of gate-level descriptions of digital circuits from behavioural specifications written in higher-level programming languages (hardware compilation) has been studied for a long time yet a definitive solution has not…
The ACL2 model of the x86 Instruction Set Architecture was built for the 64-bit mode of operation of the processor. This paper reports on our work to extend the model with support for 32-bit mode, recounting the salient aspects of this…
This research paper is proposing the idea of pseudo code representation to molecular programming used in designing molecular electronics devices. Already the schematic representation of logical gates like AND, OR, NOT etc.from molecular…
Our proposed system has seven main contributions, i.e., Smart street lights, Smart home, Bio-metric door and home security system, Intelligent traffic lights management and road security system, Private and smart parking, Intelligent…
The Analog Pipeline Chip (APC) is a low noise, low power readout chip for silicon micro strip detectors with 128 channels containing an analog pipeline of 32 buffers depth. The chip has been designed for operation at HERA with a power…
The set of externally visible properties associated with process variables in the Experimental Physics and Industrial Control System (EPICS) is predefined in the EPICS base distribution and is therefore not extensible by plug-compatible…
This paper provides an overview of the hardware and software components used in our test bed project the NET Playground. All source information is stored in the GitLab repository (https://gitlab.com/Paulteck/net-playground). In the Hardware…
The paper introduces the development of a modular compiler for a subset of a C-like language, which addresses the challenges in constructing a compiler for high-level languages. This modular approach will allow developers to modify a…
The design of Microprocessors Computer Architectures remains as a fundamental course in Computer Science and Computer Engineering. The technology and organization inside microprocessors have changed quite fast in the last twenty years. That…
Graphic Processing Units (GPUs) have become ubiquitous in scientific computing. However, writing efficient GPU kernels can be challenging due to the need for careful code tuning. To automatically explore the kernel optimization space,…
The RVfpga course offers a solid introduction to computer architecture using the RISC-V instruction set and FPGA technology. It focuses on providing hands-on experience with real-world RISC-V cores, the VeeR EH1 and the VeeR EL2, developed…
The increasing demand for electronics is driving shorter development cycles for application-specific integrated circuits (ASICs). To meet these constraints, hardware designers emphasize reusability and modularity of IP blocks, leveraging…
The capacity and programmability of reconfigurable hardware such as FPGAs has improved steadily over the years, but they do not readily provide any mechanisms for monitoring or debugging running programs. Such mechanisms need to be written…
Within this proceeding, we introduce the U-Board platform, a versatile platform for signal generation, acquisition and processing, based on a heterogenous processing architecture. Based on this platform we present a readout for Microwave…