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This paper presents a novel IP design for real-time fault/error detection and recovery on a peripheral component interconnect express (PCIe) which interfaces a host system (here a PC) to a slave design including processing system and memory…
Failure detection protocols---a fundamental building block for crafting fault-tolerant distributed systems---are in many cases described by their authors making use of informal pseudo-codes of their conception. Often these pseudo-codes use…
Large language models (LLMs) have shown promise in register-transfer level (RTL) design automation, but direct RTL generation remains difficult to validate, optimize, and integrate with compiler-based hardware design flows. Hardware…
Designing of microprocessor based controllers requires specific hardware as well as software programming. Programming depends upon type of the software whether operating software or application software. Programming requires knowledge of…
In modern audio systems, real-time digital signal processing algorithms are widely used for a variety of applications. The possibility of using a simple electronic circuit for variety of research projects has shown remarkable potential and…
The aim of this work is to define and implement an extended C++ language to support the SIMD programming paradigm. The C++ programming language has been extended to express all the potentiality of an abstract SIMD machine consisting of a…
Microcode is an abstraction layer used by modern x86 processors that interprets user-visible CISC instructions to hardware-internal RISC instructions. The capability to update x86 microcode enables a vendor to modify CPU behavior in-field,…
The Multiple Sensor Interface is a simple sensor interface that works with USB, RS485 and GPIO. It allows one to make measurements using a variety of sensors based on the change of inductance, resistance, capacitance, and frequency using…
This paper describes an experimental system designed for development of real time voice synthesis applications. The system is composed from a DSP coprocessor card, equipped with an TMS320C25 or TMS320C50 chip, voice acquisition module…
Linear transformations are cornerstone operations utilized in modern computing, but are computationally expensive on current electronic platforms. Optical computing has been positioned as a new computing solution, promising high speed and…
This paper introduces a versatile, multi-layered technology to help support teaching and learning core computer architecture concepts. This technology, called CodeAPeel is already implemented in one particular form to describe instruction…
Most of the prior works on designing codebooks for limited feedback systems have not considered the presence of strong line-of-sight (LOS) channel component. This paper proposes the design of polar-cap codebook (PCC) for multipleinput…
As tools for designing multiple processor systems-on-chips (MPSoCs) continue to evolve to meet the demands of developers, there exist systematic gaps that must be bridged to provide a more cohesive hardware/software development environment.…
Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In…
Over the last four years, we have developed a series of lectures, labs and project assignments aimed at introducing enough technology so that students from a mix of disciplines can design and build innovative interface devices.
Quantum computers promise to solve certain problems that are intractable for classical computers, such as factoring large numbers and simulating quantum systems. To date, research in quantum computer engineering has focused primarily at…
We present a modern C++17-compatible thread pool implementation, built from scratch with high-performance scientific computing in mind. The thread pool is implemented as a single lightweight and self-contained class, and does not have any…
The field of integrated circuit (IC) design is highly specialized, presenting significant barriers to entry and research and development challenges. Although large language models (LLMs) have achieved remarkable success in various domains,…
A high-level architecture of a Hybrid Reconfigurable CPU, based on a Philips-supported core processor, is introduced. It features the Philips XPLA2 CPLD as a reconfigurable functional unit. A compilation chain is presented, in which…
The PCIe400 is a generic readout board designed for high-throughput data acquisition in future high-energy physics experiments. It interfaces up to 48 bidirectional links supporting custom protocols from 1 to 26 Gbps to modern back-end…