English

Very Fast Chip-level Thermal Analysis

General Physics 2008-01-08 v1

Abstract

We present a new technique of VLSI chip-level thermal analysis. We extend a newly developed method of solving two dimensional Laplace equations to thermal analysis of four adjacent materials on a mother board. We implement our technique in C and compare its performance to that of a commercial CAD tool. Our experimental results show that our program runs 5.8 and 8.9 times faster while keeping smaller residuals by 5 and 1 order of magnitude, respectively.

Keywords

Cite

@article{arxiv.0801.1056,
  title  = {Very Fast Chip-level Thermal Analysis},
  author = {K. Nakabayashi and T. Nakabayashi and K. Nakajima},
  journal= {arXiv preprint arXiv:0801.1056},
  year   = {2008}
}

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