Disordered Systems and Neural Networks · Physics
Ultra Low Energy Analog Image Processing Using Spin Neurons
Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy
2016-11-15
Emerging Technologies · Computer Science
MRAM-based Analog Sigmoid Function for In-memory Computing
Md Hasibul Amin, Mohammed Elbtity, Mohammadreza Mohammadi, Ramtin Zand
2022-06-10
Emerging Technologies · Computer Science
Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing
Deliang Fan, Mrigank Sharad, Abhronil Sengupta, Kaushik Roy
2016-11-17
Emerging Technologies · Computer Science
Energy Efficient and High Performance Current-Mode Neural Network Circuit using Memristors and Digitally Assisted Analog CMOS Neurons
Aranya Goswamy, Sagar Kumashi, Vikash Sehwag, Siddharth Kumar Singh +3
2015-12-02
Disordered Systems and Neural Networks · Physics
Proposal For Neuromorphic Hardware Using Spin Devices
Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy
2012-07-19
Hardware Architecture · Computer Science
A Time- and Energy-Efficient CNN with Dense Connections on Memristor-Based Chips
Wenyong Zhou, Yuan Ren, Jiajun Zhou, Tianshu Hou +1
2025-08-19
Systems and Control · Electrical Eng. & Systems
A 9T4R RRAM-Based ACAM for Analogue Template Matching at the Edge
Georgios Papandroulidakis, Shady Agwa, Ahmet Cirakoglu, Themis Prodromakis
2025-01-31
Signal Processing · Electrical Eng. & Systems
Realizing Ultra-Fast and Energy-Efficient Baseband Processing Using Analogue Resistive Switching Memory
Qunsong Zeng, Jiawei Liu, Jun Lan, Yi Gong +3
2022-05-10
Signal Processing · Electrical Eng. & Systems
An RRAM-Based Implementation of a Template Matching Circuit for Low-Power Analogue Classification
Patrick Foster, Georgios Papandroulidakis, Alex Serb, Spyros Stathopoulos Themis Prodromakis
2025-01-31
Emerging Technologies · Computer Science
Resistive Memory for Computing and Security: Algorithms, Architectures, and Platforms
Simranjeet Singh, Farhad Merchant, Sachin Patkar
2024-07-08
Emerging Technologies · Computer Science
Embracing the Unreliability of Memory Devices for Neuromorphic Computing
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak +3
2020-07-14
Hardware Architecture · Computer Science
An 8-bit In Resistive Memory Computing Core with Regulated Passive Neuron and Bit Line Weight Mapping
Yewei Zhang, Kejie Huang, Rui Xiao, Haibin Shen
2020-08-27
Signal Processing · Electrical Eng. & Systems
Evaluating the Scalability of Binary and Ternary CNN Workloads on RRAM-based Compute-in-Memory Accelerators
José Cubero-Cascante, Rebecca Pelke, Noah Flohr, Arunkumar Vaidyanathan +2
2025-07-25
Hardware Architecture · Computer Science
Spin-NeuroMem: A Low-Power Neuromorphic Associative Memory Design Based on Spintronic Devices
Siqing Fu, Lizhou Wu, Tiejun Li, Chunyuan Zhang +2
2025-09-23
Hardware Architecture · Computer Science
Breaking Barriers: Maximizing Array Utilization for Compute In-Memory Fabrics
Brian Crafton, Samuel Spetalnick, Gauthaman Murali, Tushar Krishna +2
2020-08-18
Hardware Architecture · Computer Science
Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
Guan-Cheng Chen, Chieh-Lin Tsai, Pei-Hsuan Tsai, Yuan-Hao Chang
2025-12-23
Hardware Architecture · Computer Science
Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory
Weier Wan, Rajkumar Kubendran, Clemens Schaefer, S. Burc Eryilmaz +10
2021-08-19
Hardware Architecture · Computer Science
High Area/Energy Efficiency RRAM CNN Accelerator with Kernel-Reordering Weight Mapping Scheme Based on Pattern Pruning
Songming Yu, Yongpan Liu, Lu Zhang, Jingyu Wang +4
2020-10-14
Hardware Architecture · Computer Science
PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
Zhiyu Chen, Ziyuan Wen, Weier Wan, Akhil Reddy Pakala +5
2024-07-19
Signal Processing · Electrical Eng. & Systems
CompRRAE: RRAM-based Convolutional Neural Network Accelerator with Reduced Computations through a Runtime Activation Estimation
Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui
2019-06-10