English

Spin-NeuroMem: A Low-Power Neuromorphic Associative Memory Design Based on Spintronic Devices

Hardware Architecture 2025-09-23 v4 Emerging Technologies Applied Physics

Abstract

Biologically-inspired computing models have made significant progress in recent years, but the conventional von Neumann architecture is inefficient for the large-scale matrix operations and massive parallelism required by these models. This paper presents Spin-NeuroMem, a low-power circuit design of Hopfield network for the function of associative memory. Spin-NeuroMem is equipped with energy-efficient spintronic synapses which utilize magnetic tunnel junctions (MTJs) to store weight matrices of multiple associative memories. The proposed synapse design achieves as low as 17.4% power consumption compared to the state-of-the-art synapse designs. Spin-NeuroMem also encompasses a novel voltage converter with a 53.3% reduction in transistor usage for effective Hopfield network computation. In addition, we propose an associative memory simulator for the first time, which achieves a 5Mx speedup with a comparable associative memory effect. By harnessing the potential of spintronic devices, this work paves the way for the development of energy-efficient and scalable neuromorphic computing systems.

Keywords

Cite

@article{arxiv.2404.02463,
  title  = {Spin-NeuroMem: A Low-Power Neuromorphic Associative Memory Design Based on Spintronic Devices},
  author = {Siqing Fu and Lizhou Wu and Tiejun Li and Chunyuan Zhang and Jianmin Zhang and Sheng Ma},
  journal= {arXiv preprint arXiv:2404.02463},
  year   = {2025}
}

Comments

This paper is accepted by Journal of Computational Electronics

R2 v1 2026-06-28T15:42:37.646Z