Complex cryogenics is still a strong limitation to the spread of quantum voltage standards and cryogen-free operation is then particularly interesting for Josephson standards. The main difficulties in He-free refrigeration are related to chip thermalization. We tested different solutions and interface materials between the chip and the cooling surface, to improve thermal conduction. Some junctions were chosen as elements to dissipate electrical power, while some others were operated as on-chip temperature sensors. Indium foil between chip and Cu support was demonstrated to provide a good thermal interface suitable for programmable voltage standard operation. However, thermal conduction can be further increased by thermal contacting the chip at the top. Finally, general physical constraints in vacuum thermal contacts are analyzed in terms of known properties of thermal interfaces at cryogenics temperatures.
@article{arxiv.1609.03384,
title = {Thermal analysis of Josephson junctions array in cryocooler},
author = {P. Durandetto and E. Monticone and B. Trinchera and L. Lolli and D. Serazio and M. Fretto and A. Sosso},
journal= {arXiv preprint arXiv:1609.03384},
year = {2017}
}
Comments
Submitted to IEEE-Trans-AS - Major changes requested by referees