English

Signal Temporal Logic Synthesis as Probabilistic Inference

Robotics 2021-05-14 v1

Abstract

We reformulate the signal temporal logic (STL) synthesis problem as a maximum a-posteriori (MAP) inference problem. To this end, we introduce the notion of random STL~(RSTL), which extends deterministic STL with random predicates. This new probabilistic extension naturally leads to a synthesis-as-inference approach. The proposed method allows for differentiable, gradient-based synthesis while extending the class of possible uncertain semantics. We demonstrate that the proposed framework scales well with GPU-acceleration, and present realistic applications of uncertain semantics in robotics that involve target tracking and the use of occupancy grids.

Keywords

Cite

@article{arxiv.2105.06121,
  title  = {Signal Temporal Logic Synthesis as Probabilistic Inference},
  author = {Ki Myung Brian Lee and Chanyeol Yoo and Robert Fitch},
  journal= {arXiv preprint arXiv:2105.06121},
  year   = {2021}
}

Comments

7 pages, 5 figures. To appear in IEEE ICRA 2021

R2 v1 2026-06-24T02:04:05.186Z