RaPro: A Novel 5G Rapid Prototyping System Architecture

Xi Yang; Zhichao Huang; Bin Han; Senjie Zhang; Chao-Kai Wen; Feifei Gao; Shi Jin

doi:10.1109/LWC.2017.2692780

RaPro: A Novel 5G Rapid Prototyping System Architecture

Information Theory 2017-04-18 v1 math.IT

Authors: Xi Yang , Zhichao Huang , Bin Han , Senjie Zhang , Chao-Kai Wen , Feifei Gao , Shi Jin

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Abstract

We propose a novel fifth-generation (5G) rapid prototyping (RaPro) system architecture by combining FPGA-privileged modules from a software defined radio (or FPGA-coprocessor) and high-level programming language for advanced algorithms from multi-core general purpose processors. The proposed system architecture exhibits excellent flexibility and scalability in the development of a 5G prototyping system. As a proof of concept, a multi-user full-dimension multiple-input and multiple-output system is established based on the proposed architecture. Experimental results demonstrate the superiority of the proposed architecture in large-scale antenna and wideband communication systems.

Keywords

fpga accelerator network protocol cmos circuit design

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@article{arxiv.1704.04573,
  title  = {RaPro: A Novel 5G Rapid Prototyping System Architecture},
  author = {Xi Yang and Zhichao Huang and Bin Han and Senjie Zhang and Chao-Kai Wen and Feifei Gao and Shi Jin},
  journal= {arXiv preprint arXiv:1704.04573},
  year   = {2017}
}

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accepted by IEEE Wireless Communication Letters

RaPro: A Novel 5G Rapid Prototyping System Architecture

Abstract

Keywords

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