English

MRAM Co-designed Processing-in-Memory CNN Accelerator for Mobile and IoT Applications

Signal Processing 2018-11-30 v1
Authors: Baohua Sun , Daniel Liu , Leo Yu , Jay Li , Helen Liu , Wenhan Zhang , Terry Torng
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Abstract

We designed a device for Convolution Neural Network applications with non-volatile MRAM memory and computing-in-memory co-designed architecture. It has been successfully fabricated using 22nm technology node CMOS Si process. More than 40MB MRAM density with 9.9TOPS/W are provided. It enables multiple models within one single chip for mobile and IoT device applications.

Keywords

hardware acceleration neural networks for signal processing

Cite

@article{arxiv.1811.12179,
  title  = {MRAM Co-designed Processing-in-Memory CNN Accelerator for Mobile and IoT Applications},
  author = {Baohua Sun and Daniel Liu and Leo Yu and Jay Li and Helen Liu and Wenhan Zhang and Terry Torng},
  journal= {arXiv preprint arXiv:1811.12179},
  year   = {2018}
}

Comments

4 pages, 4 figures, 1 table. Accepted by NIPS 2018 MLPCD workshop

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R2 v1 2026-06-23T06:25:13.706Z