English

CIMulator: A Comprehensive Simulation Platform for Computing-In-Memory Circuit Macros with Low Bit-Width and Real Memory Materials

Neural and Evolutionary Computing 2023-06-27 v1

Abstract

This paper presents a simulation platform, namely CIMulator, for quantifying the efficacy of various synaptic devices in neuromorphic accelerators for different neural network architectures. Nonvolatile memory devices, such as resistive random-access memory, ferroelectric field-effect transistor, and volatile static random-access memory devices, can be selected as synaptic devices. A multilayer perceptron and convolutional neural networks (CNNs), such as LeNet-5, VGG-16, and a custom CNN named C4W-1, are simulated to evaluate the effects of these synaptic devices on the training and inference outcomes. The dataset used in the simulations are MNIST, CIFAR-10, and a white blood cell dataset. By applying batch normalization and appropriate optimizers in the training phase, neuromorphic systems with very low-bit-width or binary weights could achieve high pattern recognition rates that approach software-based CNN accuracy. We also introduce spiking neural networks with RRAM-based synaptic devices for the recognition of MNIST handwritten digits.

Keywords

Cite

@article{arxiv.2306.14649,
  title  = {CIMulator: A Comprehensive Simulation Platform for Computing-In-Memory Circuit Macros with Low Bit-Width and Real Memory Materials},
  author = {Hoang-Hiep Le and Md. Aftab Baig and Wei-Chen Hong and Cheng-Hsien Tsai and Cheng-Jui Yeh and Fu-Xiang Liang and I-Ting Huang and Wei-Tzu Tsai and Ting-Yin Cheng and Sourav De and Nan-Yow Chen and Wen-Jay Lee and Ing-Chao Lin and Da-Wei Chang and Darsen D. Lu},
  journal= {arXiv preprint arXiv:2306.14649},
  year   = {2023}
}
R2 v1 2026-06-28T11:14:28.573Z