LUCAS: A Low-Power Ultra-Low Jitter Compact ASIC for SiPM Targetting ToF-CT

We present LUCAS (Low power Ultra-low jitter Compact ASIC for SiPM), an analog front-end for Silicon Photomultipliers (SiPM) targeting fast timing detectors in Time-of-Flight Computed Tomography (ToF-CT). LUCAS features a very low input impedance preamplifier followed by a voltage comparator. It is designed in TSMC 65 nm low-power CMOS technology with a power supply of 1.2 V. Our first 8-channel prototype has been sent to fabrication and will be received in August 2023. Post-layout simulations predict less than 40 ps FWHM SPTR jitter and an approximate power consumption of 3.2 mW per channel. The front end is suitable for applications with rigorous jitter requirements and high event rates, thanks to its 3.9 GHz unity-gain bandwidth. The front-end compact form factor will facilitate its incorporation into systems demanding high channel densities.