English

LOCKE Detailed Specification Tables

Hardware Architecture 2012-03-27 v1

Abstract

This document shows the detailed specification of LOCKE coherence protocol for each cache controller, using a table-based technique. This representation provides clear, concise visual information yet includes sufficient detail (e.g., transient states) arguably lacking in the traditional, graphical form of state diagrams.

Cite

@article{arxiv.1203.5349,
  title  = {LOCKE Detailed Specification Tables},
  author = {Lucia G. Menezo and Valentin Puente and Jose-Angel Gregorio},
  journal= {arXiv preprint arXiv:1203.5349},
  year   = {2012}
}

Comments

3 pages

R2 v1 2026-06-21T20:39:12.147Z