The SX-Aurora TSUBASA PCIe accelerator card is the newest model of NEC's SX architecture family. Its multi-core vector processor features a vector length of 16 kbits and interfaces with up to 48 GB of HBM2 memory in the current models, available since 2018. The compute performance is up to 2.45 TFlop/s peak in double precision, and the memory throughput is up to 1.2 TB/s peak. New models with improved performance characteristics are announced for the near future. In this contribution we discuss key aspects of the SX-Aurora and describe how we enabled the architecture in the Grid Lattice QCD framework.
Cite
@article{arxiv.2001.07557,
title = {Lattice QCD on a novel vector architecture},
author = {Benjamin Huth and Nils Meyer and Tilo Wettig},
journal= {arXiv preprint arXiv:2001.07557},
year = {2020}
}
Comments
Proceedings of Lattice 2019, 7 pages, 6 colorful figures (changed Fig. 6d) and its description)