Vector architectures are essential for boosting computing throughput. ARM provides SVE as the next-generation length-agnostic vector extension beyond traditional fixed-length SIMD. This work provides a first study of the maturity and readiness of exploiting ARM and SVE in HPC. Using selected performance hardware events on the ARM Grace processor and analytical models, we derive new metrics to quantify the effectiveness of exploiting SVE vectorization to reduce executed instructions and improve performance speedup. We further propose an adapted roofline model that combines vector length and data elements to identify potential performance bottlenecks. Finally, we propose a decision tree for classifying the SVE-boosted performance in applications.
@article{arxiv.2505.09462,
title = {ARM SVE Unleashed: Performance and Insights Across HPC Applications on Nvidia Grace},
author = {Ruimin Shi and Gabin Schieffer and Maya Gokhale and Pei-Hung Lin and Hiren Patel and Ivy Peng},
journal= {arXiv preprint arXiv:2505.09462},
year = {2025}
}
Comments
To be published in the 31st European Conference on Parallel and Distributed Processing(Euro-Par 2025)