English

In-memory Associative Processors: Tutorial, Potential, and Challenges

Emerging Technologies 2022-04-14 v2 Hardware Architecture

Abstract

In-memory computing is an emerging computing paradigm that overcomes the limitations of exiting Von-Neumann computing architectures such as the memory-wall bottleneck. In such paradigm, the computations are performed directly on the data stored in the memory, which highly reduces the memory-processor communications during computation. Hence, significant speedup and energy savings could be achieved especially with data-intensive applications. Associative processors (APs) were proposed in the seventies and recently were revived thanks to the high-density memories. In this tutorial brief, we overview the functionalities and recent trends of APs in addition to the implementation of each content-addressable memory with different technologies. The AP operations and runtime complexity are also summarized. We also explain and explore the possible applications that can benefit from APs. Finally, the AP limitations, challenges, and future directions are discussed.

Keywords

Cite

@article{arxiv.2203.00662,
  title  = {In-memory Associative Processors: Tutorial, Potential, and Challenges},
  author = {Mohammed E. Fouda and Hasan Erdem Yantir and Ahmed M. Eltawil and Fadi Kurdahi},
  journal= {arXiv preprint arXiv:2203.00662},
  year   = {2022}
}

Comments

7 pages

R2 v1 2026-06-24T09:58:21.842Z