As time-to-market is crucial in the Integrated Circuit (IC) industry, speeding up layout manufacturability verifi-cation is essential. Chemical-Mechanical Polishing (CMP) plays a vital role in IC fabrication but is significantly influenced by Layout-Dependent Effects (LDE). An accurate and efficient CMP model enables design teams to correct surface unevenness before fabrication, reducing costs and accelerating the design phase. However, existing models often rely on Density Step Height (DSH) modeling, which is time-consuming for calibration and requires substantial hardware resources for fine-grained predictions. In this paper, we propose combining the advantages of two surface analysis techniques, White Light Interfer-ometry (WLI) and Atomic Force Microscopy (AFM), to train a deep learning model. This model aims to predict full-chip post-CMP nanotopography with nanometer-scale accuracy. Our deep learning model is based on a Convolutional Neural Network (CNN) and follows a two-step pipeline. The model is trained on each technique separately, resulting in a detailed full-chip CMP model.
@article{arxiv.2605.05062,
title = {Full-chip CMP modelling based on Fully Convolutional Network leveraging White Light Interferometry},
author = {Jules Exbrayat and Renan Bouis and Elie Sezestre and Viorel Balan and Arnaud Cornelis and Damien Hebras and Catherine Euvrard},
journal= {arXiv preprint arXiv:2605.05062},
year = {2026}
}
Comments
Presented at the International Conference on Planarization Technology 2025 in Hong Kong