A core problem in hardware-software codesign is in the sheer size of the design space. Without a set ISA to constrain the hardware-software interface, the design space explodes. This work presents a strategy for managing the massive hardware-software design space within the domain of machine learning inference workloads and accelerators. We first propose EngineIR, a new language for representing machine learning hardware and software in a single program. Then, using equality graphs -- a data structure from the compilers literature -- we suggest a method for efficiently enumerating the design space by performing rewrites over our representation.
@article{arxiv.2003.00290,
title = {Enumerating Hardware-Software Splits with Program Rewriting},
author = {Gus Smith and Zachary Tatlock and Luis Ceze},
journal= {arXiv preprint arXiv:2003.00290},
year = {2020}
}
Comments
Accepted in the Second Young Architect Workshop, in conjunction with ASPLOS 2020