Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking
Abstract
Integrated circuits (ICs) are the foundation of all computing systems. They comprise high-value hardware intellectual property (IP) that are at risk of piracy, reverse-engineering, and modifications while making their way through the geographically-distributed IC supply chain. On the frontier of hardware security are various design-for-trust techniques that claim to protect designs from untrusted entities across the design flow. Logic locking is one technique that promises protection from the gamut of threats in IC manufacturing. In this work, we perform a critical review of logic locking techniques in the literature, and expose several shortcomings. Taking inspiration from other cybersecurity competitions, we devise a community-led benchmarking exercise to address the evaluation deficiencies. In reflecting on this process, we shed new light on deficiencies in evaluation of logic locking and reveal important future directions. The lessons learned can guide future endeavors in other areas of hardware security.
Cite
@article{arxiv.2006.06806,
title = {Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking},
author = {Benjamin Tan and Ramesh Karri and Nimisha Limaye and Abhrajit Sengupta and Ozgur Sinanoglu and Md Moshiur Rahman and Swarup Bhunia and Danielle Duvalsaint and R. D. and Blanton and Amin Rezaei and Yuanqi Shen and Hai Zhou and Leon Li and Alex Orailoglu and Zhaokun Han and Austin Benedetti and Luciano Brignone and Muhammad Yasin and Jeyavijayan Rajendran and Michael Zuzak and Ankur Srivastava and Ujjwal Guin and Chandan Karfa and Kanad Basu and Vivek V. Menon and Matthew French and Peilin Song and Franco Stellari and Gi-Joon Nam and Peter Gadfort and Alric Althoff and Joseph Tostenrude and Saverio Fazzari and Eric Breckenfeld and Kenneth Plaks},
journal= {arXiv preprint arXiv:2006.06806},
year = {2020}
}