An FPGA-Based Semi-Automated Traffic Control System Using Verilog HDL
Abstract
Traffic Congestion is one of the severe problems in heavily populated countries like Bangladesh where Automated Traffic Control System needs to be implemented. An FPGA-based Semi-automated system is introduced in this paper including a completely new feature "Safe State" to avoid sudden unwanted collision. Here we used sequential encoding which has made the program much simpler and so that easy to control and modify. The experimental result showed the automated change in traffic lights according to the specified timing sequences which would be able to conduct maximum possible transitions of vehicles occur at different directions simultaneously without facing any accident.
Keywords
Cite
@article{arxiv.2303.04716,
title = {An FPGA-Based Semi-Automated Traffic Control System Using Verilog HDL},
author = {Anik Mallik and Sanjoy Kundu and Md. Ashikur Rahman},
journal= {arXiv preprint arXiv:2303.04716},
year = {2023}
}
Comments
In Proceedings of International Conference on Electrical, Computer and Telecommunication Engineering (ICECTE), RUET, Rajshahi, Bangladesh, 2012; 4 pages; 9 figures