We develop and study FPGA implementations of algorithms for charged particle tracking based on graph neural networks. The two complementary FPGA designs are based on OpenCL, a framework for writing programs that execute across heterogeneous platforms, and hls4ml, a high-level-synthesis-based compiler for neural network to firmware conversion. We evaluate and compare the resource usage, latency, and tracking performance of our implementations based on a benchmark dataset. We find a considerable speedup over CPU-based execution is possible, potentially enabling such algorithms to be used effectively in future computing workflows and the FPGA-based Level-1 trigger at the CERN Large Hadron Collider.
@article{arxiv.2012.01563,
title = {Accelerated Charged Particle Tracking with Graph Neural Networks on FPGAs},
author = {Aneesh Heintz and Vesal Razavimaleki and Javier Duarte and Gage DeZoort and Isobel Ojalvo and Savannah Thais and Markus Atkinson and Mark Neubauer and Lindsey Gray and Sergo Jindariani and Nhan Tran and Philip Harris and Dylan Rankin and Thea Aarrestad and Vladimir Loncar and Maurizio Pierini and Sioni Summers and Jennifer Ngadiuba and Mia Liu and Edward Kreinar and Zhenbin Wu},
journal= {arXiv preprint arXiv:2012.01563},
year = {2020}
}
Comments
8 pages, 4 figures, To appear in Third Workshop on Machine Learning and the Physical Sciences (NeurIPS 2020)