English

A Space-Charge-Limited van der Waals Spin Transistor

Mesoscale and Nanoscale Physics 2025-12-04 v1 Materials Science

Abstract

Integrating semiconducting and magnetic materials could combine transistor-like operation with nonvolatility and enable architectures such as logic-in-memory. Here, we employ correlated electrical transport and scanning nitrogen-vacancy (NV) center magnetic imaging to elucidate a spin transistor concept that amalgamates both vertical and lateral transport in a 2D antiferromagnetic semiconductor, distinct from purely vertical tunneling devices. Our device, based on a monolayer-bilayer junction in CrSBr, displays giant, gate-tunable magnetoresistance driven by the dual action of electrostatic doping on space-charge-limited lateral conduction and interlayer exchange coupling. Moreover, we visualize a field-trainable, layer-sharing effect that selects between coherent or domain-wall reversal at the spin-flip transition, enabling multilevel, memristive conductance states. These findings open opportunities for 2D magnetic semiconductors to address limitations in contemporary computing.

Keywords

Cite

@article{arxiv.2512.03306,
  title  = {A Space-Charge-Limited van der Waals Spin Transistor},
  author = {Thomas K. M. Graham and Yu-Xuan Wang and Niranjana Renjith Nair and Kseniia Mosina and Kenji Watanabe and Takashi Taniguchi and Zdenek Sofer and Brian B. Zhou},
  journal= {arXiv preprint arXiv:2512.03306},
  year   = {2025}
}

Comments

9 pages, 6 figures

R2 v1 2026-07-01T08:06:48.354Z