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Understanding Bottlenecks for Efficiently Serving LLM Inference With KV Offloading

Hardware Architecture 2026-01-29 v1 Distributed, Parallel, and Cluster Computing

Abstract

KV cache offloading enables long-context LLM inference by storing caches in CPU DRAM, but PCIe bandwidth limitations create severe bottlenecks. In this paper, we develops an analytical framework that derives κcrit\kappa_{\text{crit}}, the critical cached-to-prefill token ratio where execution becomes memory-bound and show typical workloads exceed this threshold by orders of magnitude. Empirical characterization reveals 99\% of latency spent on transfers and serving offloaded requests results in GPU's consuming only 28\% of their rated TDP, motivating our proposed optimizations for hardware interconnects, model architectures, and scheduling algorithms.

Keywords

Cite

@article{arxiv.2601.19910,
  title  = {Understanding Bottlenecks for Efficiently Serving LLM Inference With KV Offloading},
  author = {William Meng and Benjamin Lee and Hong Wang},
  journal= {arXiv preprint arXiv:2601.19910},
  year   = {2026}
}

Comments

Submitted to MLSys 2026

R2 v1 2026-07-01T09:22:44.989Z