Supporting programmable states in the data plane of a forwarding element, e.g., a switch or a NIC, has recently attracted the interest of the research community, which is now looking for the right abstraction to enable the programming of stateful network functions in hardware at line rate. We challenge the conservative assumptions of state-of-the-art abstractions in this field, e.g. always assuming minimum size packets arriving back-to-back. Using trace-based simulations we show that by making more realistic assumptions on the traffic characteristics, e.g. larger average packet size, we can relax the design constraints that currently limit the set of functions that can be implemented at line rate, allowing for more complex functions, with no harm for performance.
@article{arxiv.1702.02347,
title = {Relaxing constraints in stateful network data plane design},
author = {Carmelo Cascone and Roberto Bifulco and Salvatore Pontarelli},
journal= {arXiv preprint arXiv:1702.02347},
year = {2017}
}