Quantum Circuit Caches and Compressors for Low Latency, High Throughput Computing
Abstract
Utility-scale quantum programs contain operations on the order of which must be prepared and piped from a classical co-processor to the control unit of the quantum device. The latency of this process significantly increases with the size of the program: existing high-level classical representations of quantum programs are typically memory intensive and do not na\"ively efficiently scale to the degree required to execute utility-scale programs in real-time. To combat this limitation, we propose the utilization of high-level quantum circuit caches and compressors. The first save on the time associated with repetitive tasks and sub-circuits, and the latter are useful for representing the programs/circuits in memory-efficient formats. We present numerical evidence that caches and compressors can offer five orders of magnitude lower latencies during the automatic transpilation of extremely large quantum circuits.
Cite
@article{arxiv.2507.20677,
title = {Quantum Circuit Caches and Compressors for Low Latency, High Throughput Computing},
author = {Ioana Moflic and Alan Robertson and Simon J. Devitt and Alexandru Paler},
journal= {arXiv preprint arXiv:2507.20677},
year = {2025}
}
Comments
accepted at Q-CORE workshop of the QCE 2025