English

QAPPA: Quantization-Aware Power, Performance, and Area Modeling of DNN Accelerators

Hardware Architecture 2022-05-19 v1 Machine Learning

Abstract

As the machine learning and systems community strives to achieve higher energy-efficiency through custom DNN accelerators and model compression techniques, there is a need for a design space exploration framework that incorporates quantization-aware processing elements into the accelerator design space while having accurate and fast power, performance, and area models. In this work, we present QAPPA, a highly parameterized quantization-aware power, performance, and area modeling framework for DNN accelerators. Our framework can facilitate the future research on design space exploration of DNN accelerators for various design choices such as bit precision, processing element type, scratchpad sizes of processing elements, global buffer size, device bandwidth, number of total processing elements in the the design, and DNN workloads. Our results show that different bit precisions and processing element types lead to significant differences in terms of performance per area and energy. Specifically, our proposed lightweight processing elements achieve up to 4.9x more performance per area and energy improvement when compared to INT16 based implementation.

Keywords

Cite

@article{arxiv.2205.08648,
  title  = {QAPPA: Quantization-Aware Power, Performance, and Area Modeling of DNN Accelerators},
  author = {Ahmet Inci and Siri Garudanagiri Virupaksha and Aman Jain and Venkata Vivek Thallam and Ruizhou Ding and Diana Marculescu},
  journal= {arXiv preprint arXiv:2205.08648},
  year   = {2022}
}

Comments

Accepted paper at the On-Device Intelligence Workshop in conjunction with MLSys Conference 2021

R2 v1 2026-06-24T11:20:33.767Z