Planar quantum low-density parity-check codes with open boundaries

Although high-threshold and low-overhead quantum low-density parity-check (qLDPC) codes, such as bivariate bicycle (BB) codes, can reduce the physical-qubit cost by an order of magnitude compared to the Kitaev toric code, their torus layout remains difficult for physical implementation. In this work, we introduce the first systematic procedure to convert BB codes into fully planar, open-boundary qLDPC codes, preserving their performance. We present planar code families with logical dimensions $6 \leq k\leq13$, e.g., $[[78, 6, 6]]$, $[[107, 7, 7]]$, $[[268, 8, 12]]$, $[[405, 9, 15]]$, $[[348, 10, 13]]$, $[[450, 11, 15]]$, $[[386, 12, 12]]$, $[[362, 13, 11]]$, all with geometrically local weight-6 stabilizers. Allowing weight-8 stabilizers produces a $[[282,12,14]]$ code, exhibiting an efficiency metric ($kd^2/n$) an order of magnitude higher than the surface code. The construction combines boundary anyon condensation with the ``lattice grafting'' optimization, yielding high-performance qLDPC codes natively compatible with planar hardware architectures. It also uncovers Sierpinski-type fractal logical operators whose distance scales with the fractal area on finite lattices. These planar qLDPC codes provide an implementable route to resource-efficient, high-threshold fault tolerance and a flexible framework for future code design on realistic two-dimensional hardware.