Integration of CPU and GPU technologies is a key enabler for modern AI and graphics workloads, combining control-oriented processing with massive parallel compute capability. As systems evolve toward chiplet-based architectures, pre-silicon validation of tightly coupled CPU-GPU subsystems becomes increasingly challenging due to complex validation framework setup, large design scale, high concurrency, non-deterministic execution, and intricate protocol interactions at chiplet boundaries, often resulting in long integration cycles. This paper presents a replay-driven validation methodology developed during the integration of a CPU subsystem, multiple Xe GPU cores, and a configurable Network-on-Chip (NoC) within a foundational SoC building block targeting the ODIN integrated chiplet architecture. By leveraging deterministic waveform capture and replay across both simulation and emulation using a single design database, complex GPU workloads and protocol sequences can be reproduced reliably at the system level. This approach significantly accelerates debug, improves integration confidence, and enables end-to-end system boot and workload execution within a single quarter, demonstrating the effectiveness of replay-based validation as a scalable methodology for chiplet-based systems.
@article{arxiv.2603.16812,
title = {ODIN-Based CPU-GPU Architecture with Replay-Driven Simulation and Emulation},
author = {Nij Dorairaj and Debabrata Chatterjee and Hong Wang and Hong Jiang and Alankar Saxena and Altug Koker and Thiam Ern Lim and Cathrane Teoh and Chuan Yin Loo and Bishara Shomar and Anthony Lester},
journal= {arXiv preprint arXiv:2603.16812},
year = {2026}
}