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Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability

Hardware Architecture 2026-01-22 v1

Abstract

As semiconductor manufacturing advances from the 3-nm process toward the sub-nanometer regime and transitions from FinFETs to gate-all-around field-effect transistors (GAAFETs), the resulting complexity and manufacturing challenges continue to increase. In this context, 3D chiplet-based approaches have emerged as key enablers to address these limitations while exploiting the expanded design space. Specifically, chiplets help address the lower yields typically associated with large monolithic designs. This paradigm enables the modular design of heterogeneous systems consisting of multiple chiplets (e.g., CPUs, GPUs, memory) fabricated using different technology nodes and processes. Consequently, it offers a capable and cost-effective strategy for designing heterogeneous systems. This paper introduces the Horizon Europe Twinning project COIN-3D (Collaborative Innovation in 3D VLSI Reliability), which aims to strengthen research excellence in 2.5D/3D VLSI systems reliability through collaboration between leading European institutions. More specifically, our primary scientific goal is the provision of novel open-source Electronic Design Automation (EDA) tools for reliability assessment of 3D systems, integrating advanced algorithms for physical- and system-level reliability analysis.

Keywords

Cite

@article{arxiv.2601.14347,
  title  = {Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability},
  author = {George Rafael Gourdoumanis and Fotoini Oikonomou and Maria Pantazi-Kypraiou and Pavlos Stoikos and Olympia Axelou and Athanasios Tziouvaras and Georgios Karakonstantis and Tahani Aladwani and Christos Anagnostopoulos and Yixian Shen and Anuj Pathania and Alberto Garcia-Ortiz and George Floros},
  journal= {arXiv preprint arXiv:2601.14347},
  year   = {2026}
}

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DATE 2026

R2 v1 2026-07-01T09:13:03.106Z