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Machine Learning-Driven Intelligent Memory System Design: From On-Chip Caches to Storage

Hardware Architecture 2026-03-17 v1 Artificial Intelligence Distributed, Parallel, and Cluster Computing Machine Learning

Abstract

Despite the data-rich environment in which memory systems of modern computing platforms operate, many state-of-the-art architectural policies employed in the memory system rely on static, human-designed heuristics that fail to truly adapt to the workload and system behavior via principled learning methodologies. In this article, we propose a fundamentally different design approach: using lightweight and practical machine learning (ML) methods to enable adaptive, data-driven control throughout the memory hierarchy. We present three ML-guided architectural policies: (1) Pythia, a reinforcement learning-based data prefetcher for on-chip caches, (2) Hermes, a perceptron learning-based off-chip predictor for multi-level cache hierarchies, and (3) Sibyl, a reinforcement learning-based data placement policy for hybrid storage systems. Our evaluation shows that Pythia, Hermes, and Sibyl significantly outperform the best-prior human-designed policies, while incurring modest hardware overheads. Collectively, this article demonstrates that integrating adaptive learning into memory subsystems can lead to intelligent, self-optimizing architectures that unlock performance and efficiency gains beyond what is possible with traditional human-designed approaches.

Keywords

Cite

@article{arxiv.2603.14583,
  title  = {Machine Learning-Driven Intelligent Memory System Design: From On-Chip Caches to Storage},
  author = {Rahul Bera and Rakesh Nadig and Onur Mutlu},
  journal= {arXiv preprint arXiv:2603.14583},
  year   = {2026}
}

Comments

Extended version of the IEEE Micro 2026 article

R2 v1 2026-07-01T11:21:01.996Z