English

LIMINAL: Exploring The Frontiers of LLM Decode Performance

Hardware Architecture 2025-11-17 v2

Abstract

The rapid advancement of Large Language Models (LLMs) necessitates a deep understanding of their fundamental performance limits. This paper investigates the limits of LLM inference, focusing on hardware-imposed bottlenecks in auto-regressive decoding. We develop LIMINAL, an analytical performance model that abstracts application requirements and hardware capabilities to systematically explore performance and efficiency across a wide range of current, near-future, and hypothetical hardware. We find LIMINAL is accurate when comparing to LLMs executing on existing hardware, achieving a mean absolute error of 7.6%7.6\%. Our analysis spans from current HBM3 memory technology used in AI accelerators like GPUs and TPUs to systems based on advanced HBM4 and advanced 3D-stacked DRAM technology. We identify five non-negotiable challenges for LLM inference hardware, establishing compute, memory capacity, bandwidth and collective communication as primary barriers to performance. These findings suggest that achieving significant performance gains beyond 10,000 tokens-per-second will require not just hardware evolution but also fundamental algorithmic advances.

Keywords

Cite

@article{arxiv.2507.14397,
  title  = {LIMINAL: Exploring The Frontiers of LLM Decode Performance},
  author = {Michael Davies and Neal Crago and Karthikeyan Sankaralingam and Christos Kozyrakis},
  journal= {arXiv preprint arXiv:2507.14397},
  year   = {2025}
}
R2 v1 2026-07-01T04:08:50.181Z