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High-Performance Data Mapping for BNNs on PCM-based Integrated Photonics

Hardware Architecture 2024-02-01 v1 Emerging Technologies

Abstract

State-of-the-Art (SotA) hardware implementations of Deep Neural Networks (DNNs) incur high latencies and costs. Binary Neural Networks (BNNs) are potential alternative solutions to realize faster implementations without losing accuracy. In this paper, we first present a new data mapping, called TacitMap, suited for BNNs implemented based on a Computation-In-Memory (CIM) architecture. TacitMap maximizes the use of available parallelism, while CIM architecture eliminates the data movement overhead. We then propose a hardware accelerator based on optical phase change memory (oPCM) called EinsteinBarrier. Ein-steinBarrier incorporates TacitMap and adds an extra dimension for parallelism through wavelength division multiplexing, leading to extra latency reduction. The simulation results show that, compared to the SotA CIM baseline, TacitMap and EinsteinBarrier significantly improve execution time by up to ~154x and ~3113x, respectively, while also maintaining the energy consumption within 60% of that in the CIM baseline.

Keywords

Cite

@article{arxiv.2401.17724,
  title  = {High-Performance Data Mapping for BNNs on PCM-based Integrated Photonics},
  author = {Taha Shahroodi and Raphael Cardoso and Stephan Wong and Alberto Bosio and Ian O'Connor and Said Hamdioui},
  journal= {arXiv preprint arXiv:2401.17724},
  year   = {2024}
}

Comments

To appear in Design Automation and Test in Europe (DATE), 2024

R2 v1 2026-06-28T14:32:53.746Z